forked from OSchip/llvm-project
56 lines
1.2 KiB
LLVM
56 lines
1.2 KiB
LLVM
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; RUN: llc < %s -march=xcore | FileCheck %s
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define void @_Z1fz(...) {
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entry:
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; CHECK-LABEL: _Z1fz:
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; CHECK: extsp 3
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; CHECK: stw r[[REG:[0-3]{1,1}]]
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; CHECK: , sp{{\[}}[[REG]]{{\]}}
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; CHECK: stw r[[REG:[0-3]{1,1}]]
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; CHECK: , sp{{\[}}[[REG]]{{\]}}
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; CHECK: stw r[[REG:[0-3]{1,1}]]
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; CHECK: , sp{{\[}}[[REG]]{{\]}}
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; CHECK: stw r[[REG:[0-3]{1,1}]]
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; CHECK: , sp{{\[}}[[REG]]{{\]}}
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; CHECK: ldaw sp, sp[3]
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; CHECK: retsp 0
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ret void
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}
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declare void @llvm.va_start(i8*) nounwind
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declare void @llvm.va_end(i8*) nounwind
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declare void @f(i32) nounwind
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define void @test_vararg(...) nounwind {
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entry:
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; CHECK-LABEL: test_vararg
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; CHECK: extsp 6
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; CHECK: stw lr, sp[1]
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; CHECK: stw r0, sp[3]
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; CHECK: stw r1, sp[4]
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; CHECK: stw r2, sp[5]
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; CHECK: stw r3, sp[6]
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; CHECK: ldaw r0, sp[3]
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; CHECK: stw r0, sp[2]
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%list = alloca i8*, align 4
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%list1 = bitcast i8** %list to i8*
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call void @llvm.va_start(i8* %list1)
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br label %for.cond
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; CHECK-LABEL: .LBB1_1
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; CHECK: ldw r0, sp[2]
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; CHECK: add r1, r0, 4
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; CHECK: stw r1, sp[2]
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; CHECK: ldw r0, r0[0]
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; CHECK: bl f
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; CHECK: bu .LBB1_1
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for.cond:
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%0 = va_arg i8** %list, i32
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call void @f(i32 %0)
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br label %for.cond
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call void @llvm.va_end(i8* %list1)
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ret void
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}
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