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llvm-project/llvm/test/CodeGen/X86/mmx-copy-gprs.ll

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Fix register-dependent X86 tests. llvm-svn: 128867
2011-04-05 08:32:44 +08:00
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
X86: Do not use llc -march in tests. `llc -march` is problematic because it only switches the target architecture, but leaves the operating system unchanged. This occasionally leads to indeterministic tests because the OS from LLVM_DEFAULT_TARGET_TRIPLE is used. However we can simply always use `llc -mtriple` instead. This changes all the tests to do this to avoid people using -march when they copy and paste parts of tests. See also the discussion in https://reviews.llvm.org/D35287 llvm-svn: 309774
2017-08-02 08:28:10 +08:00
; RUN: llc < %s -mtriple=i686-- -mattr=-sse2 | FileCheck %s
; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
Start using GPR's to copy around mmx value instead of mmx regs. GCC apparently does this, and code depends on not having to do emms when this happens. This is x86-64 only so far, second half should handle x86-32. rdar://5741668 llvm-svn: 47470
2008-02-22 10:09:43 +08:00
; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
; increases the places that need to use emms.
Fix register-dependent X86 tests. llvm-svn: 128867
2011-04-05 08:32:44 +08:00
; CHECK-NOT: %mm
; CHECK-NOT: emms
Start using GPR's to copy around mmx value instead of mmx regs. GCC apparently does this, and code depends on not having to do emms when this happens. This is x86-64 only so far, second half should handle x86-32. rdar://5741668 llvm-svn: 47470
2008-02-22 10:09:43 +08:00
; rdar://5741668
copy mmx values from/to memory with GPRs on x86-32 instead of with mmx registers. This horribleness is apparently done by gcc to avoid having to insert emms in places that really should have it. This is the second half of rdar://5741668. llvm-svn: 47474
2008-02-22 13:18:04 +08:00
define void @foo(<1 x i64>* %x, <1 x i64>* %y) nounwind {
Start using GPR's to copy around mmx value instead of mmx regs. GCC apparently does this, and code depends on not having to do emms when this happens. This is x86-64 only so far, second half should handle x86-32. rdar://5741668 llvm-svn: 47470
2008-02-22 10:09:43 +08:00
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp1 = load <1 x i64>, <1 x i64>* %y, align 8 ; <<1 x i64>> [#uses=1]
Start using GPR's to copy around mmx value instead of mmx regs. GCC apparently does this, and code depends on not having to do emms when this happens. This is x86-64 only so far, second half should handle x86-32. rdar://5741668 llvm-svn: 47470
2008-02-22 10:09:43 +08:00
store <1 x i64> %tmp1, <1 x i64>* %x, align 8
copy mmx values from/to memory with GPRs on x86-32 instead of with mmx registers. This horribleness is apparently done by gcc to avoid having to insert emms in places that really should have it. This is the second half of rdar://5741668. llvm-svn: 47474
2008-02-22 13:18:04 +08:00
ret void
Start using GPR's to copy around mmx value instead of mmx regs. GCC apparently does this, and code depends on not having to do emms when this happens. This is x86-64 only so far, second half should handle x86-32. rdar://5741668 llvm-svn: 47470
2008-02-22 10:09:43 +08:00
}