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llvm-project/clang/test/CodeGen/x86_32-arguments-nommx.c

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Change -mno-mmx to be more compatible with gcc. Specifically, -mno-mmx should not imply -mno-sse. Note that because we don't usually touch the MMX registers anyway, all -mno-mmx needs to do is tweak the x86-32 calling convention a little for vectors that look like MMX vectors, and prevent the definition of __MMX__. clang doesn't actually stop the user from using MMX inline asm operands or MMX builtins in -mno-mmx mode; as a QOI issue, it would be nice to diagnose, but I doubt it really matters much. <rdar://problem/9694837> llvm-svn: 134770
2011-07-09 07:31:17 +08:00
// RUN: %clang_cc1 -target-feature -mmx -target-feature +sse2 -triple i686-pc-linux-gnu -emit-llvm -o - %s | FileCheck %s
// no-mmx should put mmx into memory
typedef int __attribute__((vector_size (8))) i32v2;
int a(i32v2 x) { return x[0]; }
CHECK-LABEL-ify some code gen tests to improve diagnostic experience when tests fail. llvm-svn: 188447
2013-08-15 14:47:53 +08:00
// CHECK-LABEL: define i32 @a(i64 %x.coerce)
Change -mno-mmx to be more compatible with gcc. Specifically, -mno-mmx should not imply -mno-sse. Note that because we don't usually touch the MMX registers anyway, all -mno-mmx needs to do is tweak the x86-32 calling convention a little for vectors that look like MMX vectors, and prevent the definition of __MMX__. clang doesn't actually stop the user from using MMX inline asm operands or MMX builtins in -mno-mmx mode; as a QOI issue, it would be nice to diagnose, but I doubt it really matters much. <rdar://problem/9694837> llvm-svn: 134770
2011-07-09 07:31:17 +08:00
// but SSE2 vectors should still go into an SSE2 register
typedef int __attribute__((vector_size (16))) i32v4;
int b(i32v4 x) { return x[0]; }
CHECK-LABEL-ify some code gen tests to improve diagnostic experience when tests fail. llvm-svn: 188447
2013-08-15 14:47:53 +08:00
// CHECK-LABEL: define i32 @b(<4 x i32> %x)