2015-01-31 19:17:59 +08:00
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//===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file a TargetTransformInfo::Concept conforming object specific to the
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/// PPC target machine. It uses the target's detailed information to
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/// provide more precise answers to certain TTI queries, while letting the
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/// target independent and default TTI implementations handle the rest.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
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#include "PPC.h"
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#include "PPCTargetMachine.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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2017-11-17 09:07:10 +08:00
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#include "llvm/CodeGen/TargetLowering.h"
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2015-01-31 19:17:59 +08:00
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namespace llvm {
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class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
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typedef BasicTTIImplBase<PPCTTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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2015-02-01 22:01:15 +08:00
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friend BaseT;
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2015-01-31 19:17:59 +08:00
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const PPCSubtarget *ST;
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const PPCTargetLowering *TLI;
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2015-02-01 22:22:17 +08:00
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const PPCSubtarget *getST() const { return ST; }
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2015-02-01 22:01:15 +08:00
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const PPCTargetLowering *getTLI() const { return TLI; }
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2015-01-31 19:17:59 +08:00
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public:
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2015-09-17 07:38:13 +08:00
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explicit PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)
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2015-07-09 10:08:42 +08:00
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: BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
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TLI(ST->getTargetLowering()) {}
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2015-01-31 19:17:59 +08:00
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/// \name Scalar TTI Implementations
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/// @{
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using BaseT::getIntImmCost;
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2015-08-06 02:08:10 +08:00
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int getIntImmCost(const APInt &Imm, Type *Ty);
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2015-01-31 19:17:59 +08:00
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2015-08-06 02:08:10 +08:00
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int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
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int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
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Type *Ty);
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2015-01-31 19:17:59 +08:00
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2017-10-20 02:16:31 +08:00
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unsigned getUserCost(const User *U, ArrayRef<const Value *> Operands);
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2015-01-31 19:17:59 +08:00
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TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
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[LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI.
Reviewers: sanjoy, anna, reames, apilipenko, igor-laevsky, mkuper
Subscribers: jholewinski, arsenm, mzolotukhin, nemanjai, nhaehnle, javed.absar, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D34531
llvm-svn: 306554
2017-06-28 23:53:17 +08:00
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void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
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TTI::UnrollingPreferences &UP);
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2015-01-31 19:17:59 +08:00
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/// @}
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/// \name Vector TTI Implementations
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/// @{
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2018-01-31 00:17:22 +08:00
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bool useColdCCForColdCall(Function &F);
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2015-03-07 07:12:04 +08:00
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bool enableAggressiveInterleaving(bool LoopHasReductions);
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2017-10-30 22:19:33 +08:00
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const TTI::MemCmpExpansionOptions *enableMemCmpExpansion(
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bool IsZeroCmp) const;
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2015-09-04 08:10:41 +08:00
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bool enableInterleavedAccessVectorization();
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2015-01-31 19:17:59 +08:00
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unsigned getNumberOfRegisters(bool Vector);
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Const correctness for TTI::getRegisterBitWidth
Summary: The method TargetTransformInfo::getRegisterBitWidth() is declared const, but the type erasing implementation classes (TargetTransformInfo::Concept & TargetTransformInfo::Model) that were introduced by Chandler in https://reviews.llvm.org/D7293 do not have the method declared const. This is an NFC to tidy up the const consistency between TTI and its implementation.
Reviewers: chandlerc, rnk, reames
Reviewed By: reames
Subscribers: reames, jfb, arsenm, dschuff, nemanjai, nhaehnle, javed.absar, sbc100, jgravelle-google, llvm-commits
Differential Revision: https://reviews.llvm.org/D33903
llvm-svn: 305189
2017-06-12 22:22:21 +08:00
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unsigned getRegisterBitWidth(bool Vector) const;
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2016-01-22 02:28:36 +08:00
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unsigned getCacheLineSize();
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2016-01-28 06:21:25 +08:00
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unsigned getPrefetchDistance();
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2015-05-07 01:12:25 +08:00
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unsigned getMaxInterleaveFactor(unsigned VF);
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2015-08-06 02:08:10 +08:00
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int getArithmeticInstrCost(
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2015-01-31 19:17:59 +08:00
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unsigned Opcode, Type *Ty,
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TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
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TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
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TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
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[X86] updating TTI costs for arithmetic instructions on X86\SLM arch.
updated instructions:
pmulld, pmullw, pmulhw, mulsd, mulps, mulpd, divss, divps, divsd, divpd, addpd and subpd.
special optimization case which replaces pmulld with pmullw\pmulhw\pshuf seq.
In case if the real operands bitwidth <= 16.
Differential Revision: https://reviews.llvm.org/D28104
llvm-svn: 291657
2017-01-11 16:23:37 +08:00
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TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
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ArrayRef<const Value *> Args = ArrayRef<const Value *>());
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2015-08-06 02:08:10 +08:00
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int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp);
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2017-04-12 19:49:08 +08:00
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int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
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const Instruction *I = nullptr);
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int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
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const Instruction *I = nullptr);
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2015-08-06 02:08:10 +08:00
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int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
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int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
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2017-04-12 19:49:08 +08:00
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unsigned AddressSpace, const Instruction *I = nullptr);
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2015-09-04 08:10:41 +08:00
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int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
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unsigned Factor,
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ArrayRef<unsigned> Indices,
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unsigned Alignment,
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2018-10-14 16:50:06 +08:00
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unsigned AddressSpace,
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bool IsMasked = false);
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2015-01-31 19:17:59 +08:00
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/// @}
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};
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} // end namespace llvm
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#endif
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