2017-06-27 06:44:03 +08:00
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//===- MacroFusion.cpp - Macro Fusion -------------------------------------===//
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2017-06-19 20:53:31 +08:00
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2017-06-19 20:53:31 +08:00
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This file contains the implementation of the DAG scheduling mutation
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/// to pair instructions back to back.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MacroFusion.h"
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2017-06-27 06:44:03 +08:00
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#include "llvm/ADT/STLExtras.h"
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2017-06-19 20:53:31 +08:00
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#include "llvm/ADT/Statistic.h"
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2017-06-27 06:44:03 +08:00
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineScheduler.h"
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#include "llvm/CodeGen/ScheduleDAG.h"
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#include "llvm/CodeGen/ScheduleDAGMutation.h"
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2017-11-08 09:01:31 +08:00
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#include "llvm/CodeGen/TargetInstrInfo.h"
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2017-06-19 20:53:31 +08:00
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#include "llvm/Support/CommandLine.h"
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2017-06-27 06:44:03 +08:00
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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2017-06-19 20:53:31 +08:00
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2017-07-12 06:08:28 +08:00
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#define DEBUG_TYPE "machine-scheduler"
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2017-06-19 20:53:31 +08:00
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STATISTIC(NumFused, "Number of instr pairs fused");
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using namespace llvm;
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static cl::opt<bool> EnableMacroFusion("misched-fusion", cl::Hidden,
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cl::desc("Enable scheduling for macro fusion."), cl::init(true));
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2017-12-12 05:09:27 +08:00
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static bool isHazard(const SDep &Dep) {
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return Dep.getKind() == SDep::Anti || Dep.getKind() == SDep::Output;
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}
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2019-12-04 12:58:34 +08:00
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static SUnit *getPredClusterSU(const SUnit &SU) {
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for (const SDep &SI : SU.Preds)
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if (SI.isCluster())
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return SI.getSUnit();
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return nullptr;
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}
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static bool hasLessThanNumFused(const SUnit &SU, unsigned FuseLimit) {
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unsigned Num = 1;
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const SUnit *CurrentSU = &SU;
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while ((CurrentSU = getPredClusterSU(*CurrentSU)) && Num < FuseLimit) Num ++;
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return Num < FuseLimit;
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}
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2019-03-29 16:33:05 +08:00
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static bool fuseInstructionPair(ScheduleDAGInstrs &DAG, SUnit &FirstSU,
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2017-06-19 20:53:31 +08:00
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SUnit &SecondSU) {
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2017-12-12 05:09:27 +08:00
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// Check that neither instr is already paired with another along the edge
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// between them.
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for (SDep &SI : FirstSU.Succs)
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if (SI.isCluster())
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return false;
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for (SDep &SI : SecondSU.Preds)
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if (SI.isCluster())
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return false;
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// Though the reachability checks above could be made more generic,
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2019-03-29 16:33:05 +08:00
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// perhaps as part of ScheduleDAGInstrs::addEdge(), since such edges are valid,
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2017-12-12 05:09:27 +08:00
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// the extra computation cost makes it less interesting in general cases.
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2017-06-19 20:53:31 +08:00
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// Create a single weak edge between the adjacent instrs. The only effect is
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// to cause bottom-up scheduling to heavily prioritize the clustered instrs.
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2017-12-12 05:09:27 +08:00
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if (!DAG.addEdge(&SecondSU, SDep(&FirstSU, SDep::Cluster)))
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return false;
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2017-06-19 20:53:31 +08:00
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2019-12-10 11:10:21 +08:00
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// TODO - If we want to chain more than two instructions, we need to create
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// artifical edges to make dependencies from the FirstSU also dependent
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// on other chained instructions, and other chained instructions also
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// dependent on the dependencies of the SecondSU, to prevent them from being
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// scheduled into these chained instructions.
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assert(hasLessThanNumFused(FirstSU, 2) &&
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"Currently we only support chaining together two instructions");
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2017-12-12 05:09:27 +08:00
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// Adjust the latency between both instrs.
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for (SDep &SI : FirstSU.Succs)
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if (SI.getSUnit() == &SecondSU)
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SI.setLatency(0);
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2017-06-19 20:53:31 +08:00
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2017-12-12 05:09:27 +08:00
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for (SDep &SI : SecondSU.Preds)
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if (SI.getSUnit() == &FirstSU)
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SI.setLatency(0);
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2017-06-19 20:53:31 +08:00
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2018-05-14 20:53:11 +08:00
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LLVM_DEBUG(
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2018-09-19 08:23:35 +08:00
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dbgs() << "Macro fuse: "; DAG.dumpNodeName(FirstSU); dbgs() << " - ";
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DAG.dumpNodeName(SecondSU); dbgs() << " / ";
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2018-05-14 20:53:11 +08:00
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dbgs() << DAG.TII->getName(FirstSU.getInstr()->getOpcode()) << " - "
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<< DAG.TII->getName(SecondSU.getInstr()->getOpcode()) << '\n';);
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2017-06-19 20:53:31 +08:00
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2017-12-12 05:09:27 +08:00
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// Make data dependencies from the FirstSU also dependent on the SecondSU to
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// prevent them from being scheduled between the FirstSU and the SecondSU.
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2017-06-19 20:53:31 +08:00
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if (&SecondSU != &DAG.ExitSU)
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for (const SDep &SI : FirstSU.Succs) {
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2017-12-12 05:09:27 +08:00
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SUnit *SU = SI.getSUnit();
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if (SI.isWeak() || isHazard(SI) ||
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SU == &DAG.ExitSU || SU == &SecondSU || SU->isPred(&SecondSU))
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continue;
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2018-09-19 08:23:35 +08:00
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LLVM_DEBUG(dbgs() << " Bind "; DAG.dumpNodeName(SecondSU);
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dbgs() << " - "; DAG.dumpNodeName(*SU); dbgs() << '\n';);
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DAG.addEdge(SU, SDep(&SecondSU, SDep::Artificial));
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}
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// Make the FirstSU also dependent on the dependencies of the SecondSU to
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// prevent them from being scheduled between the FirstSU and the SecondSU.
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2020-09-21 19:18:39 +08:00
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if (&FirstSU != &DAG.EntrySU) {
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for (const SDep &SI : SecondSU.Preds) {
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SUnit *SU = SI.getSUnit();
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if (SI.isWeak() || isHazard(SI) || &FirstSU == SU || FirstSU.isSucc(SU))
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continue;
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LLVM_DEBUG(dbgs() << " Bind "; DAG.dumpNodeName(*SU); dbgs() << " - ";
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DAG.dumpNodeName(FirstSU); dbgs() << '\n';);
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DAG.addEdge(&FirstSU, SDep(SU, SDep::Artificial));
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}
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// ExitSU comes last by design, which acts like an implicit dependency
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// between ExitSU and any bottom root in the graph. We should transfer
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// this to FirstSU as well.
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if (&SecondSU == &DAG.ExitSU) {
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for (SUnit &SU : DAG.SUnits) {
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if (SU.Succs.empty())
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DAG.addEdge(&FirstSU, SDep(&SU, SDep::Artificial));
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}
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2018-07-27 01:43:56 +08:00
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}
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}
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2017-06-19 20:53:31 +08:00
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++NumFused;
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2017-12-12 05:09:27 +08:00
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return true;
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2017-06-19 20:53:31 +08:00
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}
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2017-06-27 06:44:03 +08:00
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namespace {
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2017-06-19 20:53:31 +08:00
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2018-05-01 23:54:18 +08:00
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/// Post-process the DAG to create cluster edges between instrs that may
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2017-06-19 20:53:31 +08:00
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/// be fused by the processor into a single operation.
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class MacroFusion : public ScheduleDAGMutation {
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ShouldSchedulePredTy shouldScheduleAdjacent;
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bool FuseBlock;
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2019-03-29 16:33:05 +08:00
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bool scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU);
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2017-06-19 20:53:31 +08:00
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public:
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MacroFusion(ShouldSchedulePredTy shouldScheduleAdjacent, bool FuseBlock)
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: shouldScheduleAdjacent(shouldScheduleAdjacent), FuseBlock(FuseBlock) {}
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void apply(ScheduleDAGInstrs *DAGInstrs) override;
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};
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2017-06-27 06:44:03 +08:00
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} // end anonymous namespace
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2019-03-29 16:33:05 +08:00
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void MacroFusion::apply(ScheduleDAGInstrs *DAG) {
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2017-06-19 20:53:31 +08:00
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if (FuseBlock)
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// For each of the SUnits in the scheduling block, try to fuse the instr in
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// it with one in its predecessors.
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for (SUnit &ISU : DAG->SUnits)
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scheduleAdjacentImpl(*DAG, ISU);
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if (DAG->ExitSU.getInstr())
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// Try to fuse the instr in the ExitSU with one in its predecessors.
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scheduleAdjacentImpl(*DAG, DAG->ExitSU);
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}
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2018-05-01 23:54:18 +08:00
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/// Implement the fusion of instr pairs in the scheduling DAG,
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2017-06-19 20:53:31 +08:00
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/// anchored at the instr in AnchorSU..
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2019-03-29 16:33:05 +08:00
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bool MacroFusion::scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU) {
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const MachineInstr &AnchorMI = *AnchorSU.getInstr();
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const TargetInstrInfo &TII = *DAG.TII;
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const TargetSubtargetInfo &ST = DAG.MF.getSubtarget();
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// Check if the anchor instr may be fused.
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if (!shouldScheduleAdjacent(TII, ST, nullptr, AnchorMI))
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return false;
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// Explorer for fusion candidates among the dependencies of the anchor instr.
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for (SDep &Dep : AnchorSU.Preds) {
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2017-12-12 05:09:27 +08:00
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// Ignore dependencies other than data or strong ordering.
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if (Dep.isWeak() || isHazard(Dep))
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2017-06-19 20:53:31 +08:00
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continue;
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SUnit &DepSU = *Dep.getSUnit();
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if (DepSU.isBoundaryNode())
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continue;
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2019-12-04 12:58:34 +08:00
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// Only chain two instructions together at most.
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2017-06-19 20:53:31 +08:00
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const MachineInstr *DepMI = DepSU.getInstr();
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2019-12-04 12:58:34 +08:00
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if (!hasLessThanNumFused(DepSU, 2) ||
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!shouldScheduleAdjacent(TII, ST, DepMI, AnchorMI))
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2017-06-19 20:53:31 +08:00
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continue;
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2017-12-12 05:09:27 +08:00
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if (fuseInstructionPair(DAG, DepSU, AnchorSU))
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return true;
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2017-06-19 20:53:31 +08:00
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}
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return false;
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}
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std::unique_ptr<ScheduleDAGMutation>
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2017-06-27 06:44:03 +08:00
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llvm::createMacroFusionDAGMutation(
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ShouldSchedulePredTy shouldScheduleAdjacent) {
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2017-06-19 20:53:31 +08:00
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if(EnableMacroFusion)
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2019-08-15 23:54:37 +08:00
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return std::make_unique<MacroFusion>(shouldScheduleAdjacent, true);
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2017-06-19 20:53:31 +08:00
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return nullptr;
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}
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std::unique_ptr<ScheduleDAGMutation>
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2017-06-27 06:44:03 +08:00
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llvm::createBranchMacroFusionDAGMutation(
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ShouldSchedulePredTy shouldScheduleAdjacent) {
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2017-06-19 20:53:31 +08:00
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if(EnableMacroFusion)
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2019-08-15 23:54:37 +08:00
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return std::make_unique<MacroFusion>(shouldScheduleAdjacent, false);
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2017-06-19 20:53:31 +08:00
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return nullptr;
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}
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