2014-05-24 20:50:23 +08:00
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//===-- AArch64CleanupLocalDynamicTLSPass.cpp ---------------------*- C++ -*-=//
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2014-03-29 18:18:08 +08:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Local-dynamic access to thread-local variables proceeds in three stages.
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//
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// 1. The offset of this Module's thread-local area from TPIDR_EL0 is calculated
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// in much the same way as a general-dynamic TLS-descriptor access against
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// the special symbol _TLS_MODULE_BASE.
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// 2. The variable's offset from _TLS_MODULE_BASE_ is calculated using
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// instructions with "dtprel" modifiers.
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// 3. These two are added, together with TPIDR_EL0, to obtain the variable's
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// true address.
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//
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// This is only better than general-dynamic access to the variable if two or
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// more of the first stage TLS-descriptor calculations can be combined. This
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// pass looks through a function and performs such combinations.
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//
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//===----------------------------------------------------------------------===//
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2014-05-24 20:50:23 +08:00
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#include "AArch64.h"
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#include "AArch64InstrInfo.h"
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#include "AArch64MachineFunctionInfo.h"
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#include "AArch64TargetMachine.h"
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2014-03-29 18:18:08 +08:00
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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using namespace llvm;
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2016-08-01 13:56:57 +08:00
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#define TLSCLEANUP_PASS_NAME "AArch64 Local Dynamic TLS Access Clean-up"
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2014-03-29 18:18:08 +08:00
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namespace {
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struct LDTLSCleanup : public MachineFunctionPass {
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static char ID;
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2016-08-01 13:56:57 +08:00
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LDTLSCleanup() : MachineFunctionPass(ID) {
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initializeLDTLSCleanupPass(*PassRegistry::getPassRegistry());
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}
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2014-03-29 18:18:08 +08:00
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2014-04-29 15:58:25 +08:00
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bool runOnMachineFunction(MachineFunction &MF) override {
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2016-04-26 05:58:52 +08:00
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if (skipFunction(*MF.getFunction()))
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return false;
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2014-05-24 20:50:23 +08:00
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AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
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2014-03-29 18:18:08 +08:00
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if (AFI->getNumLocalDynamicTLSAccesses() < 2) {
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// No point folding accesses if there isn't at least two.
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return false;
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}
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MachineDominatorTree *DT = &getAnalysis<MachineDominatorTree>();
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return VisitNode(DT->getRootNode(), 0);
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}
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// Visit the dominator subtree rooted at Node in pre-order.
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// If TLSBaseAddrReg is non-null, then use that to replace any
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// TLS_base_addr instructions. Otherwise, create the register
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// when the first such instruction is seen, and then use it
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// as we encounter more instructions.
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bool VisitNode(MachineDomTreeNode *Node, unsigned TLSBaseAddrReg) {
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MachineBasicBlock *BB = Node->getBlock();
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bool Changed = false;
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// Traverse the current block.
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for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end(); I != E;
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++I) {
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switch (I->getOpcode()) {
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Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet.
As is described at http://llvm.org/bugs/show_bug.cgi?id=22408, the GNU linkers
ld.bfd and ld.gold currently only support a subset of the whole range of AArch64
ELF TLS relocations. Furthermore, they assume that some of the code sequences to
access thread-local variables are produced in a very specific sequence.
When the sequence is not as the linker expects, it can silently mis-relaxe/mis-optimize
the instructions.
Even if that wouldn't be the case, it's good to produce the exact sequence,
as that ensures that linkers can perform optimizing relaxations.
This patch:
* implements support for 16MiB TLS area size instead of 4GiB TLS area size. Ideally clang
would grow an -mtls-size option to allow support for both, but that's not part of this patch.
* by default doesn't produce local dynamic access patterns, as even modern ld.bfd and ld.gold
linkers do not support the associated relocations. An option (-aarch64-elf-ldtls-generation)
is added to enable generation of local dynamic code sequence, but is off by default.
* makes sure that the exact expected code sequence for local dynamic and general dynamic
accesses is produced, by making use of a new pseudo instruction. The patch also removes
two (AArch64ISD::TLSDESC_BLR, AArch64ISD::TLSDESC_CALL) pre-existing AArch64-specific pseudo
SDNode instructions that are superseded by the new one (TLSDESC_CALLSEQ).
llvm-svn: 231227
2015-03-04 17:12:08 +08:00
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case AArch64::TLSDESC_CALLSEQ:
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2014-03-29 18:18:08 +08:00
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// Make sure it's a local dynamic access.
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Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet.
As is described at http://llvm.org/bugs/show_bug.cgi?id=22408, the GNU linkers
ld.bfd and ld.gold currently only support a subset of the whole range of AArch64
ELF TLS relocations. Furthermore, they assume that some of the code sequences to
access thread-local variables are produced in a very specific sequence.
When the sequence is not as the linker expects, it can silently mis-relaxe/mis-optimize
the instructions.
Even if that wouldn't be the case, it's good to produce the exact sequence,
as that ensures that linkers can perform optimizing relaxations.
This patch:
* implements support for 16MiB TLS area size instead of 4GiB TLS area size. Ideally clang
would grow an -mtls-size option to allow support for both, but that's not part of this patch.
* by default doesn't produce local dynamic access patterns, as even modern ld.bfd and ld.gold
linkers do not support the associated relocations. An option (-aarch64-elf-ldtls-generation)
is added to enable generation of local dynamic code sequence, but is off by default.
* makes sure that the exact expected code sequence for local dynamic and general dynamic
accesses is produced, by making use of a new pseudo instruction. The patch also removes
two (AArch64ISD::TLSDESC_BLR, AArch64ISD::TLSDESC_CALL) pre-existing AArch64-specific pseudo
SDNode instructions that are superseded by the new one (TLSDESC_CALLSEQ).
llvm-svn: 231227
2015-03-04 17:12:08 +08:00
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if (!I->getOperand(0).isSymbol() ||
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strcmp(I->getOperand(0).getSymbolName(), "_TLS_MODULE_BASE_"))
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2014-03-29 18:18:08 +08:00
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break;
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if (TLSBaseAddrReg)
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2016-07-09 04:29:42 +08:00
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I = replaceTLSBaseAddrCall(*I, TLSBaseAddrReg);
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2014-03-29 18:18:08 +08:00
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else
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2016-07-09 04:29:42 +08:00
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I = setRegister(*I, &TLSBaseAddrReg);
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2014-03-29 18:18:08 +08:00
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Changed = true;
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break;
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default:
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break;
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}
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}
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// Visit the children of this block in the dominator tree.
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2014-04-03 04:21:22 +08:00
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for (MachineDomTreeNode *N : *Node) {
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2014-04-03 02:00:41 +08:00
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Changed |= VisitNode(N, TLSBaseAddrReg);
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2014-03-29 18:18:08 +08:00
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}
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return Changed;
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}
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// Replace the TLS_base_addr instruction I with a copy from
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// TLSBaseAddrReg, returning the new instruction.
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2016-07-09 04:29:42 +08:00
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MachineInstr *replaceTLSBaseAddrCall(MachineInstr &I,
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2014-03-29 18:18:08 +08:00
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unsigned TLSBaseAddrReg) {
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2016-07-09 04:29:42 +08:00
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MachineFunction *MF = I.getParent()->getParent();
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2015-01-30 09:10:24 +08:00
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const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
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2014-03-29 18:18:08 +08:00
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// Insert a Copy from TLSBaseAddrReg to x0, which is where the rest of the
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// code sequence assumes the address will be.
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2016-07-09 04:29:42 +08:00
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MachineInstr *Copy = BuildMI(*I.getParent(), I, I.getDebugLoc(),
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TII->get(TargetOpcode::COPY), AArch64::X0)
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.addReg(TLSBaseAddrReg);
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2014-03-29 18:18:08 +08:00
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// Erase the TLS_base_addr instruction.
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2016-07-09 04:29:42 +08:00
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I.eraseFromParent();
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2014-03-29 18:18:08 +08:00
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return Copy;
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}
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// Create a virtal register in *TLSBaseAddrReg, and populate it by
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// inserting a copy instruction after I. Returns the new instruction.
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2016-07-09 04:29:42 +08:00
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MachineInstr *setRegister(MachineInstr &I, unsigned *TLSBaseAddrReg) {
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MachineFunction *MF = I.getParent()->getParent();
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2015-01-30 09:10:24 +08:00
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const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
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2014-03-29 18:18:08 +08:00
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// Create a virtual register for the TLS base address.
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MachineRegisterInfo &RegInfo = MF->getRegInfo();
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2014-05-24 20:50:23 +08:00
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*TLSBaseAddrReg = RegInfo.createVirtualRegister(&AArch64::GPR64RegClass);
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2014-03-29 18:18:08 +08:00
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// Insert a copy from X0 to TLSBaseAddrReg for later.
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2015-10-09 06:43:26 +08:00
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MachineInstr *Copy =
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2016-07-09 04:29:42 +08:00
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BuildMI(*I.getParent(), ++I.getIterator(), I.getDebugLoc(),
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2015-10-10 00:54:54 +08:00
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TII->get(TargetOpcode::COPY), *TLSBaseAddrReg)
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2015-10-09 06:43:26 +08:00
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.addReg(AArch64::X0);
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2014-03-29 18:18:08 +08:00
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return Copy;
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}
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2016-08-01 13:56:57 +08:00
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const char *getPassName() const override { return TLSCLEANUP_PASS_NAME; }
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2014-03-29 18:18:08 +08:00
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2014-04-29 15:58:25 +08:00
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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2014-03-29 18:18:08 +08:00
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AU.setPreservesCFG();
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AU.addRequired<MachineDominatorTree>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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};
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2015-06-23 17:49:53 +08:00
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}
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2014-03-29 18:18:08 +08:00
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2016-08-01 13:56:57 +08:00
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INITIALIZE_PASS(LDTLSCleanup, "aarch64-local-dynamic-tls-cleanup",
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TLSCLEANUP_PASS_NAME, false, false)
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2014-03-29 18:18:08 +08:00
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char LDTLSCleanup::ID = 0;
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2014-05-24 20:50:23 +08:00
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FunctionPass *llvm::createAArch64CleanupLocalDynamicTLSPass() {
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2014-03-29 18:18:08 +08:00
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return new LDTLSCleanup();
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}
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