forked from OSchip/llvm-project
78 lines
2.7 KiB
LLVM
78 lines
2.7 KiB
LLVM
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; RUN: opt -gvn-hoist -newgvn -gvn-hoist -S < %s | FileCheck %s
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; Test to demonstrate that newgvn creates opportunities for
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; more gvn-hoist when sibling branches contain identical expressions.
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; Check that all "or" expressions are hoisted.
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; CHECK-LABEL: @encode
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; CHECK: or i32
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; CHECK-NOT: or i32
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define i8* @encode(i8* %p, i32 %v) {
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entry:
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%p.addr = alloca i8*, align 8
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%v.addr = alloca i32, align 4
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store i8* %p, i8** %p.addr, align 8
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store i32 %v, i32* %v.addr, align 4
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%0 = load i32, i32* %v.addr, align 4
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%cmp = icmp ult i32 %0, 23
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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%1 = load i32, i32* %v.addr, align 4
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%or = or i32 %1, 128
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%conv = trunc i32 %or to i8
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%2 = load i8*, i8** %p.addr, align 8
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%incdec.ptr = getelementptr inbounds i8, i8* %2, i32 1
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store i8* %incdec.ptr, i8** %p.addr, align 8
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store i8 %conv, i8* %2, align 1
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br label %if.end15
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if.else: ; preds = %entry
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%3 = load i32, i32* %v.addr, align 4
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%cmp1 = icmp ult i32 %3, 42
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br i1 %cmp1, label %if.then3, label %if.else9
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if.then3: ; preds = %if.else
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%4 = load i32, i32* %v.addr, align 4
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%or4 = or i32 %4, 128
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%conv5 = trunc i32 %or4 to i8
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%5 = load i8*, i8** %p.addr, align 8
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%incdec.ptr6 = getelementptr inbounds i8, i8* %5, i32 1
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store i8* %incdec.ptr6, i8** %p.addr, align 8
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store i8 %conv5, i8* %5, align 1
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%6 = load i32, i32* %v.addr, align 4
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%conv7 = trunc i32 %6 to i8
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%7 = load i8*, i8** %p.addr, align 8
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%incdec.ptr8 = getelementptr inbounds i8, i8* %7, i32 1
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store i8* %incdec.ptr8, i8** %p.addr, align 8
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store i8 %conv7, i8* %7, align 1
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br label %if.end
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if.else9: ; preds = %if.else
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%8 = load i32, i32* %v.addr, align 4
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%or10 = or i32 %8, 128
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%conv11 = trunc i32 %or10 to i8
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%9 = load i8*, i8** %p.addr, align 8
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%incdec.ptr12 = getelementptr inbounds i8, i8* %9, i32 1
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store i8* %incdec.ptr12, i8** %p.addr, align 8
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store i8 %conv11, i8* %9, align 1
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%10 = load i32, i32* %v.addr, align 4
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%shr = lshr i32 %10, 7
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%conv13 = trunc i32 %shr to i8
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%11 = load i8*, i8** %p.addr, align 8
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%incdec.ptr14 = getelementptr inbounds i8, i8* %11, i32 1
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store i8* %incdec.ptr14, i8** %p.addr, align 8
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store i8 %conv13, i8* %11, align 1
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br label %if.end
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if.end: ; preds = %if.else9, %if.then3
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br label %if.end15
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if.end15: ; preds = %if.end, %if.then
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%12 = load i8*, i8** %p.addr, align 8
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ret i8* %12
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}
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