2015-10-02 21:53:07 +08:00
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2015-09-28 17:33:22 +08:00
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; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
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; RUN: opt %loadPolly -polly-ast -analyze < %s | FileCheck %s --check-prefix=AST
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;
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; void f(int *A, int c, int N) {
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; switch (c) {
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; case -1: {
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; for (int j = N; j > 0; j--)
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; A[j] += A[j - 1];
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; break;
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; }
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; case 1: {
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; for (int j = 1; j <= N; j++)
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; A[j] += A[j - 1];
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; break;
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; }
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; }
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; }
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2016-01-15 08:48:42 +08:00
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; CHECK: Statements {
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; CHECK-NEXT: Stmt_for_body
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; CHECK-NEXT: Domain :=
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2016-01-15 23:54:45 +08:00
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; CHECK-NEXT: [c, N] -> { Stmt_for_body[i0] : c = -1 and 0 <= i0 < N };
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2016-01-15 08:48:42 +08:00
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [c, N] -> { Stmt_for_body[i0] -> [1, i0] };
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [c, N] -> { Stmt_for_body[i0] -> MemRef_A[-1 + N - i0] };
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [c, N] -> { Stmt_for_body[i0] -> MemRef_A[N - i0] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [c, N] -> { Stmt_for_body[i0] -> MemRef_A[N - i0] };
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; CHECK-NEXT: Stmt_for_body_7
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; CHECK-NEXT: Domain :=
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2016-01-15 23:54:45 +08:00
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; CHECK-NEXT: [c, N] -> { Stmt_for_body_7[i0] : c = 1 and 0 <= i0 < N };
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2016-01-15 08:48:42 +08:00
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [c, N] -> { Stmt_for_body_7[i0] -> [0, i0] };
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [c, N] -> { Stmt_for_body_7[i0] -> MemRef_A[i0] };
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [c, N] -> { Stmt_for_body_7[i0] -> MemRef_A[1 + i0] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [c, N] -> { Stmt_for_body_7[i0] -> MemRef_A[1 + i0] };
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; CHECK-NEXT: }
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; AST: if (1)
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2015-09-28 17:33:22 +08:00
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;
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2016-01-15 08:48:42 +08:00
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; AST: if (c == 1) {
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; AST-NEXT: for (int c0 = 0; c0 < N; c0 += 1)
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; AST-NEXT: Stmt_for_body_7(c0);
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; AST-NEXT: } else if (c == -1)
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; AST-NEXT: for (int c0 = 0; c0 < N; c0 += 1)
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; AST-NEXT: Stmt_for_body(c0);
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2015-09-28 17:33:22 +08:00
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;
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2016-01-15 08:48:42 +08:00
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; AST: else
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; AST-NEXT: { /* original code */ }
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2015-09-28 17:33:22 +08:00
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @f(i32* %A, i32 %c, i32 %N) {
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entry:
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br label %entry.split
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entry.split:
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switch i32 %c, label %sw.epilog [
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i32 -1, label %sw.bb
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i32 1, label %sw.bb.3
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]
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sw.bb: ; preds = %entry
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%tmp = sext i32 %N to i64
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br label %for.cond
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for.cond: ; preds = %for.inc, %sw.bb
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ %tmp, %sw.bb ]
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%j.0 = phi i32 [ %N, %sw.bb ], [ %dec, %for.inc ]
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%cmp = icmp sgt i64 %indvars.iv, 0
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%sub = add nsw i32 %j.0, -1
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%idxprom = sext i32 %sub to i64
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%arrayidx = getelementptr inbounds i32, i32* %A, i64 %idxprom
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%tmp6 = load i32, i32* %arrayidx, align 4
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%arrayidx2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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%tmp7 = load i32, i32* %arrayidx2, align 4
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%add = add nsw i32 %tmp7, %tmp6
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store i32 %add, i32* %arrayidx2, align 4
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br label %for.inc
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for.inc: ; preds = %for.body
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%dec = add nsw i32 %j.0, -1
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%indvars.iv.next = add nsw i64 %indvars.iv, -1
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br label %for.cond
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for.end: ; preds = %for.cond
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br label %sw.epilog
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sw.bb.3: ; preds = %entry
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%tmp8 = sext i32 %N to i64
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br label %for.cond.5
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for.cond.5: ; preds = %for.inc.14, %sw.bb.3
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%indvars.iv3 = phi i64 [ %indvars.iv.next4, %for.inc.14 ], [ 1, %sw.bb.3 ]
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%cmp6 = icmp sgt i64 %indvars.iv3, %tmp8
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br i1 %cmp6, label %for.end.15, label %for.body.7
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for.body.7: ; preds = %for.cond.5
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%tmp9 = add nsw i64 %indvars.iv3, -1
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%arrayidx10 = getelementptr inbounds i32, i32* %A, i64 %tmp9
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%tmp10 = load i32, i32* %arrayidx10, align 4
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%arrayidx12 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv3
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%tmp11 = load i32, i32* %arrayidx12, align 4
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%add13 = add nsw i32 %tmp11, %tmp10
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store i32 %add13, i32* %arrayidx12, align 4
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br label %for.inc.14
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for.inc.14: ; preds = %for.body.7
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%indvars.iv.next4 = add nuw nsw i64 %indvars.iv3, 1
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br label %for.cond.5
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for.end.15: ; preds = %for.cond.5
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br label %sw.epilog
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sw.epilog: ; preds = %for.end.15, %for.end, %entry
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ret void
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}
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