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llvm-project/lld/test/COFF/reloc-arm.test

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COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
# RUN: yaml2obj < %s > %t.obj
COFF: Make test commands shorter. NFC. llvm-svn: 244227
2015-08-07 00:47:46 +08:00
# RUN: lld-link /out:%t.exe /entry:main %t.obj
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
# RUN: llvm-objdump -s %t.exe | FileCheck %s
# CHECK: .text:
COFF: Layout sections in the same order as link.exe One place where this seems to matter is to make sure the .rsrc section comes after .text. The Win32 UpdateResource() function can change the contents of .rsrc. It will move the sections that come after, but if .text gets moved, the entry point header will not get updated and the executable breaks. This was found by a test in Chromium. Differential Revision: https://reviews.llvm.org/D45260 llvm-svn: 329221
2018-04-05 03:15:55 +08:00
# CHECK: 401000 01204000 00000000 00000000 00000000
# CHECK: 401010 01200000 00000000 00000000 00000000
# CHECK: 401020 42f20009 c0f24009 00000000 00000000
# CHECK: 401030 0000e62f 00000000 00000000 00000000
# CHECK: 401040 0000de07 00000000 00000000 00000000
# CHECK: 401050 0000d62f 00000000 00000000 00000000
# CHECK: 401060 00f1cef7 00000000 00000000 00000000
# CHECK: 401070 00005000 00000000 00000000 00000000
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
[yaml2obj] Updating LLD tests to account for LLVM r273915 This removed the -format flag from yaml2obj in favor of YAML tags. llvm-svn: 273920
2016-06-28 04:17:08 +08:00
--- !COFF
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
header:
Machine: IMAGE_FILE_MACHINE_ARMNT
Characteristics: []
sections:
- Name: .aaa
Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_PURGEABLE, IMAGE_SCN_MEM_16BIT, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
Alignment: 4096
SectionData: 0000000000000000
- Name: .text
Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_PURGEABLE, IMAGE_SCN_MEM_16BIT, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
Alignment: 4096
[COFF] Add support for IMAGE_REL_ARM_SECREL Handle this in the exact same way as IMAGE_REL_AMD64_SECREL and IMAGE_REL_I386_SECREL. Differential revision: https://reviews.llvm.org/D24608 llvm-svn: 282531
2016-09-28 03:27:17 +08:00
SectionData: 00000000000000000000000000000000000000000000000000000000000000004ff6ff79cff6ff79000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f000f800000000000000000000000000000000000000000000000000000000
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
Relocations:
- VirtualAddress: 0
SymbolName: foo
Update tests for ARMNT/ARM64 reloc names After ObjectYAML learnt the proper enum names for ARMNT/ARM64 relocations, it no longer accepts the numerical values. This fixes LLD tests after SVN r317459 in LLVM. llvm-svn: 317460
2017-11-06 15:22:17 +08:00
Type: IMAGE_REL_ARM_ADDR32
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
- VirtualAddress: 16
SymbolName: foo
Update tests for ARMNT/ARM64 reloc names After ObjectYAML learnt the proper enum names for ARMNT/ARM64 relocations, it no longer accepts the numerical values. This fixes LLD tests after SVN r317459 in LLVM. llvm-svn: 317460
2017-11-06 15:22:17 +08:00
Type: IMAGE_REL_ARM_ADDR32NB
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
- VirtualAddress: 32
SymbolName: foo
Update tests for ARMNT/ARM64 reloc names After ObjectYAML learnt the proper enum names for ARMNT/ARM64 relocations, it no longer accepts the numerical values. This fixes LLD tests after SVN r317459 in LLVM. llvm-svn: 317460
2017-11-06 15:22:17 +08:00
Type: IMAGE_REL_ARM_MOV32T
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
- VirtualAddress: 48
SymbolName: foo
Update tests for ARMNT/ARM64 reloc names After ObjectYAML learnt the proper enum names for ARMNT/ARM64 relocations, it no longer accepts the numerical values. This fixes LLD tests after SVN r317459 in LLVM. llvm-svn: 317460
2017-11-06 15:22:17 +08:00
Type: IMAGE_REL_ARM_BRANCH24T
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
- VirtualAddress: 64
SymbolName: foo
Update tests for ARMNT/ARM64 reloc names After ObjectYAML learnt the proper enum names for ARMNT/ARM64 relocations, it no longer accepts the numerical values. This fixes LLD tests after SVN r317459 in LLVM. llvm-svn: 317460
2017-11-06 15:22:17 +08:00
Type: IMAGE_REL_ARM_BRANCH20T
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
- VirtualAddress: 80
SymbolName: foo
Update tests for ARMNT/ARM64 reloc names After ObjectYAML learnt the proper enum names for ARMNT/ARM64 relocations, it no longer accepts the numerical values. This fixes LLD tests after SVN r317459 in LLVM. llvm-svn: 317460
2017-11-06 15:22:17 +08:00
Type: IMAGE_REL_ARM_BLX23T
COFF ARM: Clear the J1 and J2 bits when applying relocations to 24 bit branches The opcode for the bl branches can initially be F000 F800, i.e. the J1 and J2 bits are already set. Therefore mask these bits out before or'ing in the new bits. Patch by Martin Storsjö! llvm-svn: 277836
2016-08-06 01:28:21 +08:00
- VirtualAddress: 96
SymbolName: bar
Update tests for ARMNT/ARM64 reloc names After ObjectYAML learnt the proper enum names for ARMNT/ARM64 relocations, it no longer accepts the numerical values. This fixes LLD tests after SVN r317459 in LLVM. llvm-svn: 317460
2017-11-06 15:22:17 +08:00
Type: IMAGE_REL_ARM_BRANCH24T
[COFF] Add support for IMAGE_REL_ARM_SECREL Handle this in the exact same way as IMAGE_REL_AMD64_SECREL and IMAGE_REL_I386_SECREL. Differential revision: https://reviews.llvm.org/D24608 llvm-svn: 282531
2016-09-28 03:27:17 +08:00
- VirtualAddress: 112
SymbolName: bar
Update tests for ARMNT/ARM64 reloc names After ObjectYAML learnt the proper enum names for ARMNT/ARM64 relocations, it no longer accepts the numerical values. This fixes LLD tests after SVN r317459 in LLVM. llvm-svn: 317460
2017-11-06 15:22:17 +08:00
Type: IMAGE_REL_ARM_SECREL
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
symbols:
- Name: .aaa
Value: 0
SectionNumber: 1
SimpleType: IMAGE_SYM_TYPE_NULL
ComplexType: IMAGE_SYM_DTYPE_NULL
StorageClass: IMAGE_SYM_CLASS_STATIC
- Name: .text
Value: 0
SectionNumber: 2
SimpleType: IMAGE_SYM_TYPE_NULL
ComplexType: IMAGE_SYM_DTYPE_NULL
StorageClass: IMAGE_SYM_CLASS_STATIC
- Name: main
Value: 0
SectionNumber: 1
SimpleType: IMAGE_SYM_TYPE_NULL
ComplexType: IMAGE_SYM_DTYPE_NULL
StorageClass: IMAGE_SYM_CLASS_EXTERNAL
- Name: foo
Value: 0
SectionNumber: 1
SimpleType: IMAGE_SYM_TYPE_NULL
ComplexType: IMAGE_SYM_DTYPE_NULL
StorageClass: IMAGE_SYM_CLASS_EXTERNAL
COFF ARM: Clear the J1 and J2 bits when applying relocations to 24 bit branches The opcode for the bl branches can initially be F000 F800, i.e. the J1 and J2 bits are already set. Therefore mask these bits out before or'ing in the new bits. Patch by Martin Storsjö! llvm-svn: 277836
2016-08-06 01:28:21 +08:00
- Name: bar
Value: 0x500000
SectionNumber: 1
SimpleType: IMAGE_SYM_TYPE_NULL
ComplexType: IMAGE_SYM_DTYPE_NULL
StorageClass: IMAGE_SYM_CLASS_EXTERNAL
COFF: ARM: Implepment BLX23T relocation and fix Branch20T. I fed the same test to MSVC linker and got the same output, so I believe this implementation is correct. llvm-svn: 244102
2015-08-06 03:40:07 +08:00
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