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llvm-project/llvm/test/CodeGen/Mips/pbqp-reserved-physreg.ll

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RegAllocPBQP: Do not assign reserved physical register (0) RegAllocPBQP: Since getRawAllocationOrder() may return a collection that includes reserved physical registers, iterate to find an un-reserved physical register. (1) VirtRegMap: Enforce the invariant: "no reserved physical registers" in assignVirt2Phys(). Previously, this was checked only after the fact in VirtRegRewriter::rewrite. (2) MachineVerifier: updated the test per MatzeB's review. (3) +testcase Patch by Nick Johnson<Nicholas.Paul.Johnson@deshawresearch.com>! Differential Revision: https://reviews.llvm.org/D33947 llvm-svn: 305016
2017-06-09 05:30:54 +08:00
; RUN: llc -march=mips -regalloc=pbqp <%s > %t
; ModuleID = 'bugpoint-reduced-simplified.bc'
; Function Attrs: nounwind
define void @ham.928() local_unnamed_addr #0 align 2 {
bb:
switch i32 undef, label %bb35 [
i32 1, label %bb18
i32 0, label %bb19
i32 3, label %bb20
i32 2, label %bb21
i32 4, label %bb17
]
bb17: ; preds = %bb
unreachable
bb18: ; preds = %bb
unreachable
bb19: ; preds = %bb
unreachable
bb20: ; preds = %bb
unreachable
bb21: ; preds = %bb
unreachable
bb35: ; preds = %bb
unreachable
}
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" }