llvm-project/llvm/test/CodeGen/Mips/inlineasm-cnstrnt-reg64.ll

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;
; Register constraint "r" shouldn't take long long unless
; The target is 64 bit.
;
;
; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi=n64 < %s | FileCheck %s
define i32 @main() nounwind {
entry:
; r with long long
;CHECK: #APP
;CHECK: addiu ${{[0-9]+}}, ${{[0-9]+}}, 3
;CHECK: #NO_APP
tail call i64 asm sideeffect "addiu $0, $1, $2", "=r,r,i"(i64 7, i64 3) nounwind
ret i32 0
}