2016-09-01 21:58:53 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2017-06-28 18:54:54 +08:00
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+fma | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fma | FileCheck %s --check-prefix=X64
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2016-09-01 21:58:53 +08:00
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; This test checks combinations of FNEG and FMA intrinsics
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define <8 x float> @test1(<8 x float> %a, <8 x float> %b, <8 x float> %c) {
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2016-10-09 02:36:57 +08:00
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; X32-LABEL: test1:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0: # %entry
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2018-06-22 20:41:48 +08:00
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; X32-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) - ymm2
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2016-10-09 02:36:57 +08:00
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; X32-NEXT: retl
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;
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; X64-LABEL: test1:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2018-06-22 20:41:48 +08:00
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; X64-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) - ymm2
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2016-10-09 02:36:57 +08:00
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; X64-NEXT: retq
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2016-09-01 21:58:53 +08:00
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entry:
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%sub.i = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %c
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%0 = tail call <8 x float> @llvm.x86.fma.vfmadd.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %sub.i) #2
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ret <8 x float> %0
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}
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declare <8 x float> @llvm.x86.fma.vfmadd.ps.256(<8 x float>, <8 x float>, <8 x float>)
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define <4 x float> @test2(<4 x float> %a, <4 x float> %b, <4 x float> %c) {
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2016-10-09 02:36:57 +08:00
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; X32-LABEL: test2:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0: # %entry
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2018-06-22 20:41:48 +08:00
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; X32-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2
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2016-10-09 02:36:57 +08:00
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; X32-NEXT: retl
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;
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; X64-LABEL: test2:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2018-06-22 20:41:48 +08:00
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; X64-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2
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2016-10-09 02:36:57 +08:00
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; X64-NEXT: retq
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2016-09-01 21:58:53 +08:00
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entry:
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%0 = tail call <4 x float> @llvm.x86.fma.vfmadd.ps(<4 x float> %a, <4 x float> %b, <4 x float> %c) #2
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%sub.i = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0
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ret <4 x float> %sub.i
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}
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declare <4 x float> @llvm.x86.fma.vfmadd.ps(<4 x float> %a, <4 x float> %b, <4 x float> %c)
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define <4 x float> @test3(<4 x float> %a, <4 x float> %b, <4 x float> %c) {
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2016-10-09 02:36:57 +08:00
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; X32-LABEL: test3:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0: # %entry
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2018-05-12 05:59:34 +08:00
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; X32-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2
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2018-07-05 14:52:55 +08:00
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; X32-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0,-0,-0,-0]
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; X32-NEXT: vxorps %xmm1, %xmm0, %xmm0
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2016-10-09 02:36:57 +08:00
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; X32-NEXT: retl
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;
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; X64-LABEL: test3:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2018-05-12 05:59:34 +08:00
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; X64-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2
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2018-07-05 14:52:55 +08:00
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; X64-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0,-0,-0,-0]
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; X64-NEXT: vxorps %xmm1, %xmm0, %xmm0
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2016-10-09 02:36:57 +08:00
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; X64-NEXT: retq
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2016-09-01 21:58:53 +08:00
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entry:
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%0 = tail call <4 x float> @llvm.x86.fma.vfnmadd.ss(<4 x float> %a, <4 x float> %b, <4 x float> %c) #2
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%sub.i = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0
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ret <4 x float> %sub.i
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}
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declare <4 x float> @llvm.x86.fma.vfnmadd.ss(<4 x float> %a, <4 x float> %b, <4 x float> %c)
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define <8 x float> @test4(<8 x float> %a, <8 x float> %b, <8 x float> %c) {
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2016-10-09 02:36:57 +08:00
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; X32-LABEL: test4:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0: # %entry
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2018-07-05 10:52:56 +08:00
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; X32-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2
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2016-10-09 02:36:57 +08:00
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; X32-NEXT: retl
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;
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; X64-LABEL: test4:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2018-07-05 10:52:56 +08:00
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; X64-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2
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2016-10-09 02:36:57 +08:00
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; X64-NEXT: retq
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2016-09-01 21:58:53 +08:00
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entry:
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%0 = tail call <8 x float> @llvm.x86.fma.vfmsub.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %c) #2
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%sub.i = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0
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ret <8 x float> %sub.i
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}
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define <8 x float> @test5(<8 x float> %a, <8 x float> %b, <8 x float> %c) {
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2016-10-09 02:36:57 +08:00
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; X32-LABEL: test5:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0: # %entry
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2018-05-12 05:59:34 +08:00
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; X32-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2
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2016-10-09 02:36:57 +08:00
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; X32-NEXT: retl
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;
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; X64-LABEL: test5:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2018-05-12 05:59:34 +08:00
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; X64-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2
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2016-10-09 02:36:57 +08:00
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; X64-NEXT: retq
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2016-09-01 21:58:53 +08:00
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entry:
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%sub.c = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %c
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%0 = tail call <8 x float> @llvm.x86.fma.vfmsub.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %sub.c) #2
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ret <8 x float> %0
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}
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declare <8 x float> @llvm.x86.fma.vfmsub.ps.256(<8 x float>, <8 x float>, <8 x float>)
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define <2 x double> @test6(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
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2016-10-09 02:36:57 +08:00
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; X32-LABEL: test6:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0: # %entry
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2018-06-22 20:41:48 +08:00
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; X32-NEXT: vfnmsub213pd {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2
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2016-10-09 02:36:57 +08:00
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; X32-NEXT: retl
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;
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; X64-LABEL: test6:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2018-06-22 20:41:48 +08:00
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; X64-NEXT: vfnmsub213pd {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2
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2016-10-09 02:36:57 +08:00
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; X64-NEXT: retq
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2016-09-01 21:58:53 +08:00
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entry:
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%0 = tail call <2 x double> @llvm.x86.fma.vfmadd.pd(<2 x double> %a, <2 x double> %b, <2 x double> %c) #2
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%sub.i = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %0
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ret <2 x double> %sub.i
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}
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declare <2 x double> @llvm.x86.fma.vfmadd.pd(<2 x double> %a, <2 x double> %b, <2 x double> %c)
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2018-06-23 01:01:13 +08:00
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define <8 x float> @test7(float %a, <8 x float> %b, <8 x float> %c) {
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; X32-LABEL: test7:
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; X32: # %bb.0: # %entry
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2018-08-07 03:23:38 +08:00
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; X32-NEXT: vbroadcastss {{[0-9]+}}(%esp), %ymm2
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; X32-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm1
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2018-06-23 01:01:13 +08:00
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; X32-NEXT: retl
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;
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; X64-LABEL: test7:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vbroadcastss %xmm0, %ymm0
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2018-08-07 03:23:38 +08:00
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; X64-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2
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2018-06-23 01:01:13 +08:00
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; X64-NEXT: retq
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entry:
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%0 = insertelement <8 x float> undef, float %a, i32 0
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%1 = fsub <8 x float> <float -0.000000e+00, float undef, float undef, float undef, float undef, float undef, float undef, float undef>, %0
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%2 = shufflevector <8 x float> %1, <8 x float> undef, <8 x i32> zeroinitializer
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%3 = tail call <8 x float> @llvm.fma.v8f32(<8 x float> %2, <8 x float> %b, <8 x float> %c)
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ret <8 x float> %3
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}
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2018-07-06 08:31:33 +08:00
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define <8 x float> @test8(float %a, <8 x float> %b, <8 x float> %c) {
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; X32-LABEL: test8:
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; X32: # %bb.0: # %entry
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2018-08-07 03:23:38 +08:00
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; X32-NEXT: vbroadcastss {{[0-9]+}}(%esp), %ymm2
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; X32-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm1
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2018-07-06 08:31:33 +08:00
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; X32-NEXT: retl
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;
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; X64-LABEL: test8:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vbroadcastss %xmm0, %ymm0
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2018-08-07 03:23:38 +08:00
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; X64-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2
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2018-07-06 08:31:33 +08:00
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; X64-NEXT: retq
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entry:
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%0 = fsub float -0.0, %a
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%1 = insertelement <8 x float> undef, float %0, i32 0
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%2 = shufflevector <8 x float> %1, <8 x float> undef, <8 x i32> zeroinitializer
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%3 = tail call <8 x float> @llvm.fma.v8f32(<8 x float> %2, <8 x float> %b, <8 x float> %c)
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ret <8 x float> %3
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}
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2018-06-23 01:01:13 +08:00
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declare <8 x float> @llvm.fma.v8f32(<8 x float> %a, <8 x float> %b, <8 x float> %c)
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