2016-03-10 07:13:12 +08:00
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; RUN: opt -S -codegenprepare < %s | FileCheck %s
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target datalayout =
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"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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target triple = "x86_64-unknown-linux-gnu"
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2017-07-13 07:30:02 +08:00
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@x = external global [1 x [2 x <4 x float>]]
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2016-03-10 07:13:12 +08:00
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; Can we sink single addressing mode computation to use?
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define void @test1(i1 %cond, i64* %base) {
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; CHECK-LABEL: @test1
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2017-04-07 06:42:18 +08:00
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; CHECK: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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entry:
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%addr = getelementptr inbounds i64, i64* %base, i64 5
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%casted = bitcast i64* %addr to i32*
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br i1 %cond, label %if.then, label %fallthrough
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if.then:
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%v = load i32, i32* %casted, align 4
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br label %fallthrough
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fallthrough:
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ret void
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}
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declare void @foo(i32)
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; Make sure sinking two copies of addressing mode into different blocks works
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define void @test2(i1 %cond, i64* %base) {
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; CHECK-LABEL: @test2
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entry:
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%addr = getelementptr inbounds i64, i64* %base, i64 5
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%casted = bitcast i64* %addr to i32*
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br i1 %cond, label %if.then, label %fallthrough
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if.then:
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; CHECK-LABEL: if.then:
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2017-04-07 06:42:18 +08:00
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; CHECK: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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%v1 = load i32, i32* %casted, align 4
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call void @foo(i32 %v1)
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%cmp = icmp eq i32 %v1, 0
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br i1 %cmp, label %next, label %fallthrough
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next:
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; CHECK-LABEL: next:
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2017-04-07 06:42:18 +08:00
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; CHECK: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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%v2 = load i32, i32* %casted, align 4
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call void @foo(i32 %v2)
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br label %fallthrough
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fallthrough:
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ret void
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}
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; If we have two loads in the same block, only need one copy of addressing mode
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; - instruction selection will duplicate if needed
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define void @test3(i1 %cond, i64* %base) {
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; CHECK-LABEL: @test3
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entry:
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%addr = getelementptr inbounds i64, i64* %base, i64 5
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%casted = bitcast i64* %addr to i32*
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br i1 %cond, label %if.then, label %fallthrough
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if.then:
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; CHECK-LABEL: if.then:
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2017-04-07 06:42:18 +08:00
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; CHECK: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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%v1 = load i32, i32* %casted, align 4
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call void @foo(i32 %v1)
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2017-04-07 06:42:18 +08:00
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; CHECK-NOT: getelementptr i8, {{.+}}, 40
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2016-03-10 07:13:12 +08:00
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%v2 = load i32, i32* %casted, align 4
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call void @foo(i32 %v2)
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br label %fallthrough
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fallthrough:
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ret void
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}
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; Can we still sink addressing mode if there's a cold use of the
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; address itself?
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define void @test4(i1 %cond, i64* %base) {
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; CHECK-LABEL: @test4
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entry:
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%addr = getelementptr inbounds i64, i64* %base, i64 5
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%casted = bitcast i64* %addr to i32*
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br i1 %cond, label %if.then, label %fallthrough
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if.then:
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; CHECK-LABEL: if.then:
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2017-04-07 06:42:18 +08:00
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; CHECK: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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%v1 = load i32, i32* %casted, align 4
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call void @foo(i32 %v1)
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%cmp = icmp eq i32 %v1, 0
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br i1 %cmp, label %rare.1, label %fallthrough
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fallthrough:
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ret void
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rare.1:
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; CHECK-LABEL: rare.1:
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2017-04-07 06:42:18 +08:00
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; CHECK: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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call void @slowpath(i32 %v1, i32* %casted) cold
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br label %fallthrough
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}
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; Negative test - don't want to duplicate addressing into hot path
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define void @test5(i1 %cond, i64* %base) {
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; CHECK-LABEL: @test5
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entry:
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; CHECK: %addr = getelementptr
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%addr = getelementptr inbounds i64, i64* %base, i64 5
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%casted = bitcast i64* %addr to i32*
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br i1 %cond, label %if.then, label %fallthrough
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if.then:
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; CHECK-LABEL: if.then:
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2017-04-07 06:42:18 +08:00
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; CHECK-NOT: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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%v1 = load i32, i32* %casted, align 4
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call void @foo(i32 %v1)
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%cmp = icmp eq i32 %v1, 0
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br i1 %cmp, label %rare.1, label %fallthrough
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fallthrough:
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ret void
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rare.1:
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call void @slowpath(i32 %v1, i32* %casted) ;; NOT COLD
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br label %fallthrough
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}
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; Negative test - opt for size
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define void @test6(i1 %cond, i64* %base) minsize {
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; CHECK-LABEL: @test6
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entry:
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; CHECK: %addr = getelementptr
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%addr = getelementptr inbounds i64, i64* %base, i64 5
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%casted = bitcast i64* %addr to i32*
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br i1 %cond, label %if.then, label %fallthrough
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if.then:
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; CHECK-LABEL: if.then:
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2017-04-07 06:42:18 +08:00
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; CHECK-NOT: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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%v1 = load i32, i32* %casted, align 4
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call void @foo(i32 %v1)
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%cmp = icmp eq i32 %v1, 0
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br i1 %cmp, label %rare.1, label %fallthrough
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fallthrough:
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ret void
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rare.1:
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call void @slowpath(i32 %v1, i32* %casted) cold
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br label %fallthrough
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}
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; Make sure sinking two copies of addressing mode into different blocks works
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; when there are cold paths for each.
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define void @test7(i1 %cond, i64* %base) {
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; CHECK-LABEL: @test7
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entry:
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%addr = getelementptr inbounds i64, i64* %base, i64 5
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%casted = bitcast i64* %addr to i32*
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br i1 %cond, label %if.then, label %fallthrough
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if.then:
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; CHECK-LABEL: if.then:
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2017-04-07 06:42:18 +08:00
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; CHECK: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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%v1 = load i32, i32* %casted, align 4
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call void @foo(i32 %v1)
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%cmp = icmp eq i32 %v1, 0
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br i1 %cmp, label %rare.1, label %next
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next:
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; CHECK-LABEL: next:
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2017-04-07 06:42:18 +08:00
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; CHECK: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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%v2 = load i32, i32* %casted, align 4
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call void @foo(i32 %v2)
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%cmp2 = icmp eq i32 %v2, 0
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br i1 %cmp2, label %rare.1, label %fallthrough
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fallthrough:
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ret void
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rare.1:
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; CHECK-LABEL: rare.1:
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2017-04-07 06:42:18 +08:00
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; CHECK: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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call void @slowpath(i32 %v1, i32* %casted) cold
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br label %next
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rare.2:
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; CHECK-LABEL: rare.2:
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2017-04-07 06:42:18 +08:00
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; CHECK: getelementptr i8, {{.+}} 40
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2016-03-10 07:13:12 +08:00
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call void @slowpath(i32 %v2, i32* %casted) cold
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br label %fallthrough
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}
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declare void @slowpath(i32, i32*)
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2017-07-13 07:30:02 +08:00
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; Make sure we don't end up in an infinite loop after we fail to sink.
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; CHECK-LABEL: define void @test8
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; CHECK: %ptr = getelementptr i8, i8* %aFOO_load_ptr2int_2void, i32 undef
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define void @test8() {
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allocas:
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%aFOO_load = load float*, float** undef
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%aFOO_load_ptr2int = ptrtoint float* %aFOO_load to i64
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%aFOO_load_ptr2int_broadcast_init = insertelement <4 x i64> undef, i64 %aFOO_load_ptr2int, i32 0
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%aFOO_load_ptr2int_2void = inttoptr i64 %aFOO_load_ptr2int to i8*
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%ptr = getelementptr i8, i8* %aFOO_load_ptr2int_2void, i32 undef
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br label %load.i145
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load.i145:
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%ptr.i143 = bitcast i8* %ptr to <4 x float>*
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%valall.i144 = load <4 x float>, <4 x float>* %ptr.i143, align 4
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%x_offset = getelementptr [1 x [2 x <4 x float>]], [1 x [2 x <4 x float>]]* @x, i32 0, i64 0
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br label %pl_loop.i.i122
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pl_loop.i.i122:
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br label %pl_loop.i.i122
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}
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2017-07-19 12:49:17 +08:00
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; Make sure we can sink address computation even
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; if there is a cycle in phi nodes.
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define void @test9(i1 %cond, i64* %base) {
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; CHECK-LABEL: @test9
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entry:
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%addr = getelementptr inbounds i64, i64* %base, i64 5
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%casted = bitcast i64* %addr to i32*
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br label %header
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header:
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%iv = phi i32 [0, %entry], [%iv.inc, %backedge]
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%casted.loop = phi i32* [%casted, %entry], [%casted.merged, %backedge]
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br i1 %cond, label %if.then, label %backedge
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if.then:
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call void @foo(i32 %iv)
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%addr.1 = getelementptr inbounds i64, i64* %base, i64 5
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%casted.1 = bitcast i64* %addr.1 to i32*
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br label %backedge
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backedge:
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; CHECK-LABEL: backedge:
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; CHECK: getelementptr i8, {{.+}} 40
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%casted.merged = phi i32* [%casted.loop, %header], [%casted.1, %if.then]
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%v = load i32, i32* %casted.merged, align 4
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call void @foo(i32 %v)
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%iv.inc = add i32 %iv, 1
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%cmp = icmp slt i32 %iv.inc, 1000
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br i1 %cmp, label %header, label %exit
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exit:
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ret void
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}
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