2019-03-01 04:38:45 +08:00
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; RUN: llc < %s | FileCheck %s
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; Make sure the prologue is sane. (Doesn't need to exactly match this,
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; but the original issue only reproduced if the cbz was immediately
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; after the frame setup.)
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2020-04-01 04:12:54 +08:00
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; CHECK: stp x29, x30, [sp, #-32]!
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[AArch64] Generate and parse SEH assembly directives
This ensures that you get the same output regardless if generating
code directly to an object file or if generating assembly and
assembling that.
Add implementations of the EmitARM64WinCFI*() methods in
AArch64TargetAsmStreamer, and fill in one blank in MCAsmStreamer.
Add corresponding directive handlers in AArch64AsmParser and
COFFAsmParser.
Some SEH directive names have been picked to match the prior art
for SEH assembly directives for x86_64, e.g. the spelling of
".seh_startepilogue" matching the preexisting ".seh_endprologue".
For the directives for saving registers, the exact spelling
from the arm64 documentation is picked, e.g. ".seh_save_reg" (to follow
that naming for all the other ones, e.g. ".seh_save_fregp_x"), while
the corresponding one for x86_64 is plain ".seh_savereg" without the
second underscore.
Directives in the epilogues have the same names as in prologues,
e.g. .seh_savereg, even though the registers are restored, not
saved, at that point.
Differential Revision: https://reviews.llvm.org/D86529
2020-08-07 17:44:48 +08:00
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; CHECK-NEXT: .seh_save_fplr_x 32
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2020-04-01 04:12:54 +08:00
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; CHECK-NEXT: mov x29, sp
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[AArch64] Generate and parse SEH assembly directives
This ensures that you get the same output regardless if generating
code directly to an object file or if generating assembly and
assembling that.
Add implementations of the EmitARM64WinCFI*() methods in
AArch64TargetAsmStreamer, and fill in one blank in MCAsmStreamer.
Add corresponding directive handlers in AArch64AsmParser and
COFFAsmParser.
Some SEH directive names have been picked to match the prior art
for SEH assembly directives for x86_64, e.g. the spelling of
".seh_startepilogue" matching the preexisting ".seh_endprologue".
For the directives for saving registers, the exact spelling
from the arm64 documentation is picked, e.g. ".seh_save_reg" (to follow
that naming for all the other ones, e.g. ".seh_save_fregp_x"), while
the corresponding one for x86_64 is plain ".seh_savereg" without the
second underscore.
Directives in the epilogues have the same names as in prologues,
e.g. .seh_savereg, even though the registers are restored, not
saved, at that point.
Differential Revision: https://reviews.llvm.org/D86529
2020-08-07 17:44:48 +08:00
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; CHECK-NEXT: .seh_set_fp
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; CHECK-NEXT: .seh_endprologue
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2019-03-26 05:25:28 +08:00
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; CHECK-NEXT: mov x1, #-2
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2020-04-01 04:12:54 +08:00
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; CHECK-NEXT: stur x1, [x29, #16]
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2019-03-01 04:38:45 +08:00
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; CHECK-NEXT: cbz w0, .LBB0_2
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target datalayout = "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-windows-msvc19.11.0"
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; Function Attrs: uwtable
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define dso_local void @"?f@@YAXH@Z"(i32 %x) local_unnamed_addr #0 personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
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entry:
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%cmp = icmp eq i32 %x, 0
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br i1 %cmp, label %try.cont, label %if.then
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if.then: ; preds = %entry
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invoke void @"?g@@YAXXZ"()
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to label %try.cont unwind label %catch.dispatch
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catch.dispatch: ; preds = %if.then
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%0 = catchswitch within none [label %catch] unwind to caller
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catch: ; preds = %catch.dispatch
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%1 = catchpad within %0 [i8* null, i32 64, i8* null]
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catchret from %1 to label %try.cont
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try.cont: ; preds = %entry, %if.then, %catch
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ret void
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}
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declare dso_local void @"?g@@YAXXZ"() local_unnamed_addr #1
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declare dso_local i32 @__CxxFrameHandler3(...)
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