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llvm-project/llvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir

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[AArch64][SVE] Preserve full vector regs over EH edge. Unwinders may only preserve the lower 64bits of Neon and SVE registers, as only the registers in the base ABI are guaranteed to be preserved over the exception edge. The caller will need to preserve additional registers for when the call throws an exception and the unwinder has tried to recover state. For e.g. svint32_t bar(svint32_t); svint32_t foo(svint32_t x, bool *err) { try { bar(x); } catch (...) { *err = true; } return x; } `z0` needs to be spilled before the call to `bar(x)` and reloaded before returning from foo, as the exception handler may have clobbered z0. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D84737
2020-09-02 17:12:27 +08:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -run-pass=regallocfast,prologepilog -simplify-mir -o - %s | FileCheck %s
# This test checks that the MIRParser correctly clobbers the registers
# that are not preserved by the unwinder (when the MIR contains an EH pad).
--- |
; ModuleID = '<stdin>'
source_filename = "<stdin>"
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"
define aarch64_vector_pcs <4 x i32> @invoke_callee_may_throw_neon(<4 x i32> %v) personality i8 0 {
%result = invoke aarch64_vector_pcs <4 x i32> @may_throw_neon(<4 x i32> %v)
to label %.Lcontinue unwind label %.Lunwind
.Lcontinue: ; preds = %0
ret <4 x i32> %result
.Lunwind: ; preds = %0
%lp = landingpad { i8*, i32 }
cleanup
ret <4 x i32> %v
}
declare aarch64_vector_pcs <4 x i32> @may_throw_neon(<4 x i32>)
...
---
name: invoke_callee_may_throw_neon
alignment: 4
legalized: true
regBankSelected: true
selected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr128 }
- { id: 1, class: fpr128 }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
liveins:
- { reg: '$q0' }
frameInfo:
maxAlignment: 1
adjustsStack: true
hasCalls: true
maxCallFrameSize: 0
machineFunctionInfo: {}
body: |
; CHECK-LABEL: name: invoke_callee_may_throw_neon
; CHECK: bb.0 (%ir-block.0):
; CHECK: successors: %bb.1, %bb.2
; CHECK: liveins: $q0, $q22, $q23, $q20, $q21, $q18, $q19, $q16, $q17, $q14, $q15, $q12, $q13, $q10, $q11, $q8, $q9, $lr, $fp
; CHECK: $sp = frame-setup SUBXri $sp, 304, 0
; CHECK: frame-setup STPQi killed $q23, killed $q22, $sp, 2 :: (store 16 into %stack.19), (store 16 into %stack.18)
; CHECK: frame-setup STPQi killed $q21, killed $q20, $sp, 4 :: (store 16 into %stack.17), (store 16 into %stack.16)
; CHECK: frame-setup STPQi killed $q19, killed $q18, $sp, 6 :: (store 16 into %stack.15), (store 16 into %stack.14)
; CHECK: frame-setup STPQi killed $q17, killed $q16, $sp, 8 :: (store 16 into %stack.13), (store 16 into %stack.12)
; CHECK: frame-setup STPQi killed $q15, killed $q14, $sp, 10 :: (store 16 into %stack.11), (store 16 into %stack.10)
; CHECK: frame-setup STPQi killed $q13, killed $q12, $sp, 12 :: (store 16 into %stack.9), (store 16 into %stack.8)
; CHECK: frame-setup STPQi killed $q11, killed $q10, $sp, 14 :: (store 16 into %stack.7), (store 16 into %stack.6)
; CHECK: frame-setup STPQi killed $q9, killed $q8, $sp, 16 :: (store 16 into %stack.5), (store 16 into %stack.4)
; CHECK: frame-setup STPXi killed $fp, killed $lr, $sp, 36 :: (store 8 into %stack.3), (store 8 into %stack.2)
; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 304
; CHECK: frame-setup CFI_INSTRUCTION offset $w30, -8
; CHECK: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK: frame-setup CFI_INSTRUCTION offset $b8, -32
; CHECK: frame-setup CFI_INSTRUCTION offset $b9, -48
; CHECK: frame-setup CFI_INSTRUCTION offset $b10, -64
; CHECK: frame-setup CFI_INSTRUCTION offset $b11, -80
; CHECK: frame-setup CFI_INSTRUCTION offset $b12, -96
; CHECK: frame-setup CFI_INSTRUCTION offset $b13, -112
; CHECK: frame-setup CFI_INSTRUCTION offset $b14, -128
; CHECK: frame-setup CFI_INSTRUCTION offset $b15, -144
; CHECK: frame-setup CFI_INSTRUCTION offset $b16, -160
; CHECK: frame-setup CFI_INSTRUCTION offset $b17, -176
; CHECK: frame-setup CFI_INSTRUCTION offset $b18, -192
; CHECK: frame-setup CFI_INSTRUCTION offset $b19, -208
; CHECK: frame-setup CFI_INSTRUCTION offset $b20, -224
; CHECK: frame-setup CFI_INSTRUCTION offset $b21, -240
; CHECK: frame-setup CFI_INSTRUCTION offset $b22, -256
; CHECK: frame-setup CFI_INSTRUCTION offset $b23, -272
Reapply "RegAllocFast: Rewrite and improve" This reverts commit 73a6a164b84a8195defbb8f5eeb6faecfc478ad4.
2020-09-22 20:55:54 +08:00
; CHECK: STRQui $q0, $sp, 0 :: (store 16 into %stack.1)
[AArch64][SVE] Preserve full vector regs over EH edge. Unwinders may only preserve the lower 64bits of Neon and SVE registers, as only the registers in the base ABI are guaranteed to be preserved over the exception edge. The caller will need to preserve additional registers for when the call throws an exception and the unwinder has tried to recover state. For e.g. svint32_t bar(svint32_t); svint32_t foo(svint32_t x, bool *err) { try { bar(x); } catch (...) { *err = true; } return x; } `z0` needs to be spilled before the call to `bar(x)` and reloaded before returning from foo, as the exception handler may have clobbered z0. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D84737
2020-09-02 17:12:27 +08:00
; CHECK: EH_LABEL <mcsymbol .Ltmp0>
Reapply "RegAllocFast: Rewrite and improve" This reverts commit 73a6a164b84a8195defbb8f5eeb6faecfc478ad4.
2020-09-22 20:55:54 +08:00
; CHECK: BL @may_throw_neon, csr_aarch64_aavpcs, implicit-def dead $lr, implicit $sp, implicit killed $q0, implicit-def $q0
; CHECK: STRQui killed $q0, $sp, 1 :: (store 16 into %stack.0)
[AArch64][SVE] Preserve full vector regs over EH edge. Unwinders may only preserve the lower 64bits of Neon and SVE registers, as only the registers in the base ABI are guaranteed to be preserved over the exception edge. The caller will need to preserve additional registers for when the call throws an exception and the unwinder has tried to recover state. For e.g. svint32_t bar(svint32_t); svint32_t foo(svint32_t x, bool *err) { try { bar(x); } catch (...) { *err = true; } return x; } `z0` needs to be spilled before the call to `bar(x)` and reloaded before returning from foo, as the exception handler may have clobbered z0. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D84737
2020-09-02 17:12:27 +08:00
; CHECK: EH_LABEL <mcsymbol .Ltmp1>
; CHECK: B %bb.1
; CHECK: bb.1..Lcontinue:
Reapply "RegAllocFast: Rewrite and improve" This reverts commit 73a6a164b84a8195defbb8f5eeb6faecfc478ad4.
2020-09-22 20:55:54 +08:00
; CHECK: $q0 = LDRQui $sp, 1 :: (load 16 from %stack.0)
[AArch64][SVE] Preserve full vector regs over EH edge. Unwinders may only preserve the lower 64bits of Neon and SVE registers, as only the registers in the base ABI are guaranteed to be preserved over the exception edge. The caller will need to preserve additional registers for when the call throws an exception and the unwinder has tried to recover state. For e.g. svint32_t bar(svint32_t); svint32_t foo(svint32_t x, bool *err) { try { bar(x); } catch (...) { *err = true; } return x; } `z0` needs to be spilled before the call to `bar(x)` and reloaded before returning from foo, as the exception handler may have clobbered z0. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D84737
2020-09-02 17:12:27 +08:00
; CHECK: $fp, $lr = frame-destroy LDPXi $sp, 36 :: (load 8 from %stack.3), (load 8 from %stack.2)
; CHECK: $q9, $q8 = frame-destroy LDPQi $sp, 16 :: (load 16 from %stack.5), (load 16 from %stack.4)
; CHECK: $q11, $q10 = frame-destroy LDPQi $sp, 14 :: (load 16 from %stack.7), (load 16 from %stack.6)
; CHECK: $q13, $q12 = frame-destroy LDPQi $sp, 12 :: (load 16 from %stack.9), (load 16 from %stack.8)
; CHECK: $q15, $q14 = frame-destroy LDPQi $sp, 10 :: (load 16 from %stack.11), (load 16 from %stack.10)
; CHECK: $q17, $q16 = frame-destroy LDPQi $sp, 8 :: (load 16 from %stack.13), (load 16 from %stack.12)
; CHECK: $q19, $q18 = frame-destroy LDPQi $sp, 6 :: (load 16 from %stack.15), (load 16 from %stack.14)
; CHECK: $q21, $q20 = frame-destroy LDPQi $sp, 4 :: (load 16 from %stack.17), (load 16 from %stack.16)
; CHECK: $q23, $q22 = frame-destroy LDPQi $sp, 2 :: (load 16 from %stack.19), (load 16 from %stack.18)
; CHECK: $sp = frame-destroy ADDXri $sp, 304, 0
; CHECK: RET_ReallyLR implicit killed $q0
; CHECK: bb.2..Lunwind (landing-pad):
; CHECK: liveins: $x0, $x1
; CHECK: EH_LABEL <mcsymbol .Ltmp2>
Reapply "RegAllocFast: Rewrite and improve" This reverts commit 73a6a164b84a8195defbb8f5eeb6faecfc478ad4.
2020-09-22 20:55:54 +08:00
; CHECK: $q0 = LDRQui $sp, 0 :: (load 16 from %stack.1)
[AArch64][SVE] Preserve full vector regs over EH edge. Unwinders may only preserve the lower 64bits of Neon and SVE registers, as only the registers in the base ABI are guaranteed to be preserved over the exception edge. The caller will need to preserve additional registers for when the call throws an exception and the unwinder has tried to recover state. For e.g. svint32_t bar(svint32_t); svint32_t foo(svint32_t x, bool *err) { try { bar(x); } catch (...) { *err = true; } return x; } `z0` needs to be spilled before the call to `bar(x)` and reloaded before returning from foo, as the exception handler may have clobbered z0. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D84737
2020-09-02 17:12:27 +08:00
; CHECK: $fp, $lr = frame-destroy LDPXi $sp, 36 :: (load 8 from %stack.3), (load 8 from %stack.2)
; CHECK: $q9, $q8 = frame-destroy LDPQi $sp, 16 :: (load 16 from %stack.5), (load 16 from %stack.4)
; CHECK: $q11, $q10 = frame-destroy LDPQi $sp, 14 :: (load 16 from %stack.7), (load 16 from %stack.6)
; CHECK: $q13, $q12 = frame-destroy LDPQi $sp, 12 :: (load 16 from %stack.9), (load 16 from %stack.8)
; CHECK: $q15, $q14 = frame-destroy LDPQi $sp, 10 :: (load 16 from %stack.11), (load 16 from %stack.10)
; CHECK: $q17, $q16 = frame-destroy LDPQi $sp, 8 :: (load 16 from %stack.13), (load 16 from %stack.12)
; CHECK: $q19, $q18 = frame-destroy LDPQi $sp, 6 :: (load 16 from %stack.15), (load 16 from %stack.14)
; CHECK: $q21, $q20 = frame-destroy LDPQi $sp, 4 :: (load 16 from %stack.17), (load 16 from %stack.16)
; CHECK: $q23, $q22 = frame-destroy LDPQi $sp, 2 :: (load 16 from %stack.19), (load 16 from %stack.18)
; CHECK: $sp = frame-destroy ADDXri $sp, 304, 0
; CHECK: RET_ReallyLR implicit killed $q0
bb.0 (%ir-block.0):
successors: %bb.1, %bb.2
liveins: $q0
%0:fpr128 = COPY $q0
EH_LABEL <mcsymbol .Ltmp0>
ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
$q0 = COPY %0
BL @may_throw_neon, csr_aarch64_aavpcs, implicit-def $lr, implicit $sp, implicit $q0, implicit-def $q0
%1:fpr128 = COPY $q0
ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
EH_LABEL <mcsymbol .Ltmp1>
B %bb.1
bb.1..Lcontinue:
$q0 = COPY %1
RET_ReallyLR implicit $q0
bb.2..Lunwind (landing-pad):
liveins: $x0, $x1
EH_LABEL <mcsymbol .Ltmp2>
$q0 = COPY %0
RET_ReallyLR implicit $q0
...