forked from OSchip/llvm-project
37 lines
1.6 KiB
LLVM
37 lines
1.6 KiB
LLVM
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; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
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; This is used to crash in LiveIntervalAnalysis via SILoadStoreOptimizer
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; while fixing up the merge of two ds_write instructions.
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@tess_lds = external addrspace(3) global [8192 x i32]
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; CHECK-LABEL: {{^}}main:
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; CHECK: ds_write2_b32
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; CHECK: v_mov_b32_e32 v1, v0
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; CHECK: tbuffer_store_format_xyzw v[0:3],
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define amdgpu_vs void @main(i32 inreg %arg) {
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main_body:
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%tmp = load float, float addrspace(3)* undef, align 4
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%tmp1 = load float, float addrspace(3)* undef, align 4
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store float %tmp, float addrspace(3)* null, align 4
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%tmp2 = bitcast float %tmp to i32
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%tmp3 = add nuw nsw i32 0, 1
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%tmp4 = zext i32 %tmp3 to i64
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%tmp5 = getelementptr [8192 x i32], [8192 x i32] addrspace(3)* @tess_lds, i64 0, i64 %tmp4
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%tmp6 = bitcast i32 addrspace(3)* %tmp5 to float addrspace(3)*
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store float %tmp1, float addrspace(3)* %tmp6, align 4
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%tmp7 = bitcast float %tmp1 to i32
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%tmp8 = insertelement <4 x i32> undef, i32 %tmp2, i32 0
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%tmp9 = insertelement <4 x i32> %tmp8, i32 %tmp7, i32 1
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%tmp10 = insertelement <4 x i32> %tmp9, i32 undef, i32 2
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%tmp11 = insertelement <4 x i32> %tmp10, i32 undef, i32 3
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call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %tmp11, i32 4, i32 undef, i32 %arg, i32 0, i32 14, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
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ret void
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}
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; Function Attrs: nounwind
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declare void @llvm.SI.tbuffer.store.v4i32(<16 x i8>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) #0
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attributes #0 = { nounwind }
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