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llvm-project/llvm/test/CodeGen/Mips/extins.ll

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[mips] Do not generate INS/EXT nodes if target does not have support for ins/ext. llvm-svn: 192330
2013-10-10 07:36:17 +08:00
; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=32R2
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
2015-10-15 22:34:23 +08:00
; RUN: llc < %s -march=mips -mattr=mips16 | FileCheck %s -check-prefix=16
Add support for ext and ins. llvm-svn: 137804
2011-08-17 10:05:42 +08:00
define i32 @ext0_5_9(i32 %s, i32 %pos, i32 %sz) nounwind readnone {
entry:
[mips] Do not generate INS/EXT nodes if target does not have support for ins/ext. llvm-svn: 192330
2013-10-10 07:36:17 +08:00
; 32R2: ext ${{[0-9]+}}, $4, 5, 9
; 16-NOT: ext ${{[0-9]+}}
Add support for ext and ins. llvm-svn: 137804
2011-08-17 10:05:42 +08:00
%shr = lshr i32 %s, 5
%and = and i32 %shr, 511
ret i32 %and
}
define void @ins2_5_9(i32 %s, i32* nocapture %d) nounwind {
entry:
[mips] Do not generate INS/EXT nodes if target does not have support for ins/ext. llvm-svn: 192330
2013-10-10 07:36:17 +08:00
; 32R2: ins ${{[0-9]+}}, $4, 5, 9
; 16-NOT: ins ${{[0-9]+}}
Add support for ext and ins. llvm-svn: 137804
2011-08-17 10:05:42 +08:00
%and = shl i32 %s, 5
%shl = and i32 %and, 16352
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp3 = load i32, i32* %d, align 4
Add support for ext and ins. llvm-svn: 137804
2011-08-17 10:05:42 +08:00
%and5 = and i32 %tmp3, -16353
%or = or i32 %and5, %shl
store i32 %or, i32* %d, align 4
ret void
}