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llvm-project/llvm/test/MC/ARM/neont2-mul-encoding.s

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Fix misspelled target triples in MC/ARM test commands. llvm-svn: 121901
2010-12-16 06:14:01 +08:00
@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-12 05:15:47 +08:00
.code 16
vmul.i8 d16, d16, d17
vmul.i16 d16, d16, d17
vmul.i32 d16, d16, d17
vmul.f32 d16, d16, d17
vmul.i8 q8, q8, q9
vmul.i16 q8, q8, q9
vmul.i32 q8, q8, q9
vmul.f32 q8, q8, q9
vmul.p8 d16, d16, d17
vmul.p8 q8, q8, q9
ARM vmul assembly parsing for the lane index operand. llvm-svn: 142381
2011-10-19 02:01:52 +08:00
vmul.i16 d18, d8, d0[3]
Tidy up formatting. llvm-svn: 142382
2011-10-19 02:05:16 +08:00
@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x09]
@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x09]
@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x09]
@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x0d]
@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x09]
@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x09]
@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x09]
@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x0d]
@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x09]
@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x09]
@ CHECK: vmul.i16 d18, d8, d0[3] @ encoding: [0xd8,0xef,0x68,0x28]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-12 05:15:47 +08:00
vqdmulh.s16 d16, d16, d17
vqdmulh.s32 d16, d16, d17
vqdmulh.s16 q8, q8, q9
vqdmulh.s32 q8, q8, q9
ARM vqdmulh assembly parsing for the lane index operand. llvm-svn: 142386
2011-10-19 02:12:09 +08:00
vqdmulh.s16 d11, d2, d3[0]
Tidy up formatting. llvm-svn: 142382
2011-10-19 02:05:16 +08:00
@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x0b]
@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0b]
@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x0b]
@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x0b]
ARM vqdmulh assembly parsing for the lane index operand. llvm-svn: 142386
2011-10-19 02:12:09 +08:00
@ CHECK: vqdmulh.s16 d11, d2, d3[0] @ encoding: [0x92,0xef,0x43,0xbc]
Tidy up formatting. llvm-svn: 142382
2011-10-19 02:05:16 +08:00
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-12 05:15:47 +08:00
vqrdmulh.s16 d16, d16, d17
vqrdmulh.s32 d16, d16, d17
vqrdmulh.s16 q8, q8, q9
vqrdmulh.s32 q8, q8, q9
Tidy up formatting. llvm-svn: 142382
2011-10-19 02:05:16 +08:00
@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x0b]
@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x0b]
@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x0b]
@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x0b]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-12 05:15:47 +08:00
vmull.s8 q8, d16, d17
vmull.s16 q8, d16, d17
vmull.s32 q8, d16, d17
vmull.u8 q8, d16, d17
vmull.u16 q8, d16, d17
vmull.u32 q8, d16, d17
vmull.p8 q8, d16, d17
Tidy up formatting. llvm-svn: 142382
2011-10-19 02:05:16 +08:00
@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0c]
@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0c]
@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0c]
@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xc0,0xff,0xa1,0x0c]
@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xd0,0xff,0xa1,0x0c]
@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xe0,0xff,0xa1,0x0c]
@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0e]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-12 05:15:47 +08:00
vqdmull.s16 q8, d16, d17
vqdmull.s32 q8, d16, d17
Enable and fix a test. llvm-svn: 147011
2011-12-21 07:20:00 +08:00
vqdmull.s16 q1, d7, d1[1]
Add several FIXME cases for ARM encodings. llvm-svn: 142377
2011-10-19 01:50:22 +08:00
Tidy up formatting. llvm-svn: 142382
2011-10-19 02:05:16 +08:00
@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0d]
@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0d]
Enable and fix a test. llvm-svn: 147011
2011-12-21 07:20:00 +08:00
@ CHECK: vqdmull.s16 q1, d7, d1[1] @ encoding: [0x97,0xef,0x49,0x2b]
Another failing encoding. llvm-svn: 142388
2011-10-19 02:23:03 +08:00