forked from OSchip/llvm-project
436 lines
12 KiB
LLVM
436 lines
12 KiB
LLVM
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; RUN: llc < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define void @a32min(i32* nocapture dereferenceable(4) %minimum, i32 %val) #0 {
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entry:
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%0 = atomicrmw min i32* %minimum, i32 %val monotonic
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ret void
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; CHECK-LABEL: @a32min
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmpw 4, [[OLDV]]
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; CHECK: bgelr 0
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; CHECK: stwcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a32max(i32* nocapture dereferenceable(4) %minimum, i32 %val) #0 {
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entry:
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%0 = atomicrmw max i32* %minimum, i32 %val monotonic
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ret void
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; CHECK-LABEL: @a32max
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmpw 4, [[OLDV]]
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; CHECK: blelr 0
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; CHECK: stwcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a32umin(i32* nocapture dereferenceable(4) %minimum, i32 %val) #0 {
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entry:
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%0 = atomicrmw umin i32* %minimum, i32 %val monotonic
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ret void
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; CHECK-LABEL: @a32umin
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmplw 4, [[OLDV]]
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; CHECK: bgelr 0
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; CHECK: stwcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a32umax(i32* nocapture dereferenceable(4) %minimum, i32 %val) #0 {
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entry:
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%0 = atomicrmw umax i32* %minimum, i32 %val monotonic
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ret void
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; CHECK-LABEL: @a32umax
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmplw 4, [[OLDV]]
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; CHECK: blelr 0
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; CHECK: stwcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a16min(i16* nocapture dereferenceable(4) %minimum, i16 %val) #1 {
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entry:
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%0 = atomicrmw min i16* %minimum, i16 %val monotonic
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ret void
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; CHECK-LABEL: @a16min
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; CHECK: lharx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmpw 4, [[OLDV]]
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; CHECK: bgelr 0
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; CHECK: sthcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a16max(i16* nocapture dereferenceable(4) %minimum, i16 %val) #1 {
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entry:
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%0 = atomicrmw max i16* %minimum, i16 %val monotonic
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ret void
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; CHECK-LABEL: @a16max
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; CHECK: lharx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmpw 4, [[OLDV]]
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; CHECK: blelr 0
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; CHECK: sthcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a16umin(i16* nocapture dereferenceable(4) %minimum, i16 %val) #1 {
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entry:
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%0 = atomicrmw umin i16* %minimum, i16 %val monotonic
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ret void
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; CHECK-LABEL: @a16umin
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; CHECK: lharx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmplw 4, [[OLDV]]
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; CHECK: bgelr 0
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; CHECK: sthcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a16umax(i16* nocapture dereferenceable(4) %minimum, i16 %val) #1 {
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entry:
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%0 = atomicrmw umax i16* %minimum, i16 %val monotonic
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ret void
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; CHECK-LABEL: @a16umax
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; CHECK: lharx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmplw 4, [[OLDV]]
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; CHECK: blelr 0
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; CHECK: sthcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a8min(i8* nocapture dereferenceable(4) %minimum, i8 %val) #1 {
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entry:
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%0 = atomicrmw min i8* %minimum, i8 %val monotonic
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ret void
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; CHECK-LABEL: @a8min
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; CHECK: lbarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmpw 4, [[OLDV]]
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; CHECK: bgelr 0
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; CHECK: stbcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a8max(i8* nocapture dereferenceable(4) %minimum, i8 %val) #1 {
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entry:
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%0 = atomicrmw max i8* %minimum, i8 %val monotonic
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ret void
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; CHECK-LABEL: @a8max
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; CHECK: lbarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmpw 4, [[OLDV]]
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; CHECK: blelr 0
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; CHECK: stbcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a8umin(i8* nocapture dereferenceable(4) %minimum, i8 %val) #1 {
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entry:
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%0 = atomicrmw umin i8* %minimum, i8 %val monotonic
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ret void
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; CHECK-LABEL: @a8umin
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; CHECK: lbarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmplw 4, [[OLDV]]
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; CHECK: bgelr 0
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; CHECK: stbcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a8umax(i8* nocapture dereferenceable(4) %minimum, i8 %val) #1 {
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entry:
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%0 = atomicrmw umax i8* %minimum, i8 %val monotonic
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ret void
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; CHECK-LABEL: @a8umax
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; CHECK: lbarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmplw 4, [[OLDV]]
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; CHECK: blelr 0
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; CHECK: stbcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a64min(i64* nocapture dereferenceable(4) %minimum, i64 %val) #0 {
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entry:
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%0 = atomicrmw min i64* %minimum, i64 %val monotonic
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ret void
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; CHECK-LABEL: @a64min
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; CHECK: ldarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmpd 4, [[OLDV]]
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; CHECK: bgelr 0
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; CHECK: stdcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a64max(i64* nocapture dereferenceable(4) %minimum, i64 %val) #0 {
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entry:
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%0 = atomicrmw max i64* %minimum, i64 %val monotonic
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ret void
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; CHECK-LABEL: @a64max
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; CHECK: ldarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmpd 4, [[OLDV]]
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; CHECK: blelr 0
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; CHECK: stdcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a64umin(i64* nocapture dereferenceable(4) %minimum, i64 %val) #0 {
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entry:
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%0 = atomicrmw umin i64* %minimum, i64 %val monotonic
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ret void
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; CHECK-LABEL: @a64umin
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; CHECK: ldarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmpld 4, [[OLDV]]
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; CHECK: bgelr 0
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; CHECK: stdcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @a64umax(i64* nocapture dereferenceable(4) %minimum, i64 %val) #0 {
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entry:
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%0 = atomicrmw umax i64* %minimum, i64 %val monotonic
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ret void
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; CHECK-LABEL: @a64umax
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; CHECK: ldarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: cmpld 4, [[OLDV]]
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; CHECK: blelr 0
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; CHECK: stdcx. 4, 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @ae16min(i16* nocapture dereferenceable(4) %minimum, i16 %val) #0 {
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entry:
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%0 = atomicrmw min i16* %minimum, i16 %val monotonic
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ret void
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; CHECK-LABEL: @ae16min
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; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 27
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; CHECK-DAG: li [[M1:[0-9]+]], 0
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; CHECK-DAG: rldicr 3, 3, 0, 61
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; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 16
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; CHECK-DAG: ori [[M2:[0-9]+]], [[M1]], 65535
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; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
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; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]]
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; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]]
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: srw [[SMOLDV:[0-9]+]], [[MOLDV]], [[SA]]
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; CHECK: extsh [[SESMOLDV:[0-9]+]], [[SMOLDV]]
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; CHECK: cmpw 0, 4, [[SESMOLDV]]
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; CHECK: bgelr 0
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; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]]
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; CHECK: stwcx. [[NEWV]], 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @ae16max(i16* nocapture dereferenceable(4) %minimum, i16 %val) #0 {
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entry:
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%0 = atomicrmw max i16* %minimum, i16 %val monotonic
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ret void
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; CHECK-LABEL: @ae16max
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; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 27
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; CHECK-DAG: li [[M1:[0-9]+]], 0
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; CHECK-DAG: rldicr 3, 3, 0, 61
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; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 16
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; CHECK-DAG: ori [[M2:[0-9]+]], [[M1]], 65535
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; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
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; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]]
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; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]]
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: srw [[SMOLDV:[0-9]+]], [[MOLDV]], [[SA]]
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; CHECK: extsh [[SESMOLDV:[0-9]+]], [[SMOLDV]]
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; CHECK: cmpw 0, 4, [[SESMOLDV]]
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; CHECK: blelr 0
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; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]]
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; CHECK: stwcx. [[NEWV]], 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @ae16umin(i16* nocapture dereferenceable(4) %minimum, i16 %val) #0 {
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entry:
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%0 = atomicrmw umin i16* %minimum, i16 %val monotonic
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ret void
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; CHECK-LABEL: @ae16umin
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; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 27
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; CHECK-DAG: li [[M1:[0-9]+]], 0
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; CHECK-DAG: rldicr 3, 3, 0, 61
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; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 16
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; CHECK-DAG: ori [[M2:[0-9]+]], [[M1]], 65535
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; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
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; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]]
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; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]]
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: cmplw 0, 4, [[MOLDV]]
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; CHECK: bgelr 0
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; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]]
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; CHECK: stwcx. [[NEWV]], 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @ae16umax(i16* nocapture dereferenceable(4) %minimum, i16 %val) #0 {
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entry:
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%0 = atomicrmw umax i16* %minimum, i16 %val monotonic
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ret void
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; CHECK-LABEL: @ae16umax
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; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 27
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; CHECK-DAG: li [[M1:[0-9]+]], 0
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; CHECK-DAG: rldicr 3, 3, 0, 61
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; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 16
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; CHECK-DAG: ori [[M2:[0-9]+]], [[M1]], 65535
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; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
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; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]]
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; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]]
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: cmplw 0, 4, [[MOLDV]]
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; CHECK: blelr 0
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; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]]
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; CHECK: stwcx. [[NEWV]], 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @ae8min(i8* nocapture dereferenceable(4) %minimum, i8 %val) #0 {
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entry:
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%0 = atomicrmw min i8* %minimum, i8 %val monotonic
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ret void
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; CHECK-LABEL: @ae8min
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; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 28
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; CHECK-DAG: li [[M1:[0-9]+]], 255
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; CHECK-DAG: rldicr 3, 3, 0, 61
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; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 24
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; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
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; CHECK-DAG: slw [[M:[0-9]+]], [[M1]], [[SA]]
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; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]]
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: srw [[SMOLDV:[0-9]+]], [[MOLDV]], [[SA]]
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; CHECK: extsb [[SESMOLDV:[0-9]+]], [[SMOLDV]]
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; CHECK: cmpw 0, 4, [[SESMOLDV]]
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; CHECK: bgelr 0
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; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]]
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; CHECK: stwcx. [[NEWV]], 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @ae8max(i8* nocapture dereferenceable(4) %minimum, i8 %val) #0 {
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entry:
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%0 = atomicrmw max i8* %minimum, i8 %val monotonic
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ret void
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; CHECK-LABEL: @ae8max
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; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 28
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; CHECK-DAG: li [[M1:[0-9]+]], 255
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; CHECK-DAG: rldicr 3, 3, 0, 61
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; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 24
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; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
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; CHECK-DAG: slw [[M:[0-9]+]], [[M1]], [[SA]]
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; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]]
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: srw [[SMOLDV:[0-9]+]], [[MOLDV]], [[SA]]
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; CHECK: extsb [[SESMOLDV:[0-9]+]], [[SMOLDV]]
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; CHECK: cmpw 0, 4, [[SESMOLDV]]
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; CHECK: blelr 0
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; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]]
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; CHECK: stwcx. [[NEWV]], 0, 3
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @ae8umin(i8* nocapture dereferenceable(4) %minimum, i8 %val) #0 {
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entry:
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%0 = atomicrmw umin i8* %minimum, i8 %val monotonic
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ret void
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; CHECK-LABEL: @ae8umin
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; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 28
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; CHECK-DAG: li [[M1:[0-9]+]], 255
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; CHECK-DAG: rldicr 3, 3, 0, 61
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; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 24
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; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
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; CHECK-DAG: slw [[M:[0-9]+]], [[M1]], [[SA]]
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; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]]
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
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; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: cmplw 0, 4, [[MOLDV]]
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; CHECK: bgelr 0
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; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
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; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]]
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; CHECK: stwcx. [[NEWV]], 0, 3
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||
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; CHECK: bne 0,
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; CHECK: blr
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}
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define void @ae8umax(i8* nocapture dereferenceable(4) %minimum, i8 %val) #0 {
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||
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entry:
|
||
|
|
%0 = atomicrmw umax i8* %minimum, i8 %val monotonic
|
||
|
|
ret void
|
||
|
|
|
||
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; CHECK-LABEL: @ae8umax
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||
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; CHECK-DAG: rlwinm [[SA1:[0-9]+]], 3, 3, 27, 28
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||
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; CHECK-DAG: li [[M1:[0-9]+]], 255
|
||
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; CHECK-DAG: rldicr 3, 3, 0, 61
|
||
|
|
; CHECK-DAG: xori [[SA:[0-9]+]], [[SA1]], 24
|
||
|
|
; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
|
||
|
|
; CHECK-DAG: slw [[M:[0-9]+]], [[M1]], [[SA]]
|
||
|
|
; CHECK-DAG: and [[SMV:[0-9]+]], [[SV]], [[M]]
|
||
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; CHECK: lwarx [[OLDV:[0-9]+]], 0, 3
|
||
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; CHECK: and [[MOLDV:[0-9]+]], [[OLDV]], [[M]]
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||
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; CHECK: cmplw 0, 4, [[MOLDV]]
|
||
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|
; CHECK: blelr 0
|
||
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; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
|
||
|
|
; CHECK: or [[NEWV:[0-9]+]], [[SMV]], [[NOLDV]]
|
||
|
|
; CHECK: stwcx. [[NEWV]], 0, 3
|
||
|
|
; CHECK: bne 0,
|
||
|
|
; CHECK: blr
|
||
|
|
}
|
||
|
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|
||
|
|
attributes #0 = { nounwind "target-cpu"="ppc64" }
|
||
|
|
attributes #1 = { nounwind "target-cpu"="pwr8" }
|
||
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