2012-12-12 05:25:42 +08:00
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//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2012-12-12 05:25:42 +08:00
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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2018-05-01 23:54:18 +08:00
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/// The AMDGPU TargetMachine interface definition for hw codgen targets.
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2012-12-12 05:25:42 +08:00
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//
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//===----------------------------------------------------------------------===//
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2016-03-11 16:00:27 +08:00
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
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2012-12-12 05:25:42 +08:00
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#include "AMDGPUSubtarget.h"
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2016-12-10 06:06:55 +08:00
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#include "llvm/ADT/Optional.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Target/TargetMachine.h"
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#include <memory>
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2012-12-12 05:25:42 +08:00
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namespace llvm {
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2015-01-07 02:00:21 +08:00
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//===----------------------------------------------------------------------===//
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// AMDGPU Target Machine (R600+)
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//===----------------------------------------------------------------------===//
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2017-10-13 06:57:28 +08:00
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class AMDGPUTargetMachine : public LLVMTargetMachine {
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2015-01-07 02:00:21 +08:00
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protected:
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2015-09-26 05:41:28 +08:00
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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2012-12-12 05:25:42 +08:00
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2016-06-28 04:48:03 +08:00
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StringRef getGPUName(const Function &F) const;
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StringRef getFeatureString(const Function &F) const;
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2012-12-12 05:25:42 +08:00
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public:
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2017-10-11 04:22:07 +08:00
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static bool EnableLateStructurizeCFG;
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2018-07-10 22:03:41 +08:00
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static bool EnableFunctionCalls;
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2017-10-11 04:22:07 +08:00
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2016-02-06 02:29:17 +08:00
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AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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2016-05-19 06:04:49 +08:00
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StringRef FS, TargetOptions Options,
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2017-08-03 10:16:21 +08:00
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Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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2016-05-19 06:04:49 +08:00
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CodeGenOpt::Level OL);
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2016-12-10 06:06:55 +08:00
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~AMDGPUTargetMachine() override;
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2015-03-12 08:07:24 +08:00
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AMDGPU: Separate R600 and GCN TableGen files
Summary:
We now have two sets of generated TableGen files, one for R600 and one
for GCN, so each sub-target now has its own tables of instructions,
registers, ISel patterns, etc. This should help reduce compile time
since each sub-target now only has to consider information that
is specific to itself. This will also help prevent the R600
sub-target from slowing down new features for GCN, like disassembler
support, GlobalISel, etc.
Reviewers: arsenm, nhaehnle, jvesely
Reviewed By: arsenm
Subscribers: MatzeB, kzhuravl, wdng, mgorny, yaxunl, dstuttard, tpr, t-tye, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D46365
llvm-svn: 335942
2018-06-29 07:47:12 +08:00
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const TargetSubtargetInfo *getSubtargetImpl() const;
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const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
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2015-01-31 19:17:59 +08:00
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2014-11-13 17:26:31 +08:00
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TargetLoweringObjectFile *getObjFileLowering() const override {
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2015-09-26 05:41:28 +08:00
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return TLOF.get();
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2014-11-13 17:26:31 +08:00
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}
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2017-01-27 00:49:08 +08:00
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void adjustPassManager(PassManagerBuilder &) override;
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2018-08-31 13:49:54 +08:00
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2017-02-07 08:43:21 +08:00
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/// Get the integer value of a null pointer in the given address space.
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uint64_t getNullPointerValue(unsigned AddrSpace) const {
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2018-08-31 13:49:54 +08:00
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return (AddrSpace == AMDGPUAS::LOCAL_ADDRESS ||
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AddrSpace == AMDGPUAS::REGION_ADDRESS) ? -1 : 0;
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2017-02-07 08:43:21 +08:00
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}
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2012-12-12 05:25:42 +08:00
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};
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2015-02-12 01:11:50 +08:00
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//===----------------------------------------------------------------------===//
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// R600 Target Machine (R600 -> Cayman)
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//===----------------------------------------------------------------------===//
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2016-03-11 16:00:27 +08:00
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class R600TargetMachine final : public AMDGPUTargetMachine {
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2016-06-24 14:30:11 +08:00
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private:
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2016-06-28 04:48:03 +08:00
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mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
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2015-02-12 01:11:50 +08:00
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public:
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2016-02-06 02:29:17 +08:00
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R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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2016-05-19 06:04:49 +08:00
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StringRef FS, TargetOptions Options,
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2017-08-03 10:16:21 +08:00
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Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL, bool JIT);
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2015-02-12 01:11:51 +08:00
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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2016-06-24 14:30:11 +08:00
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2016-06-28 04:48:03 +08:00
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const R600Subtarget *getSubtargetImpl(const Function &) const override;
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2017-06-01 02:41:23 +08:00
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2018-05-31 06:55:35 +08:00
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TargetTransformInfo getTargetTransformInfo(const Function &F) override;
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2017-06-01 02:41:23 +08:00
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bool isMachineVerifierClean() const override {
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return false;
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}
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2015-02-12 01:11:50 +08:00
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};
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2015-01-07 02:00:21 +08:00
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//===----------------------------------------------------------------------===//
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// GCN Target Machine (SI+)
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//===----------------------------------------------------------------------===//
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2016-03-11 16:00:27 +08:00
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class GCNTargetMachine final : public AMDGPUTargetMachine {
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2016-06-24 14:30:11 +08:00
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private:
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2018-07-12 04:59:01 +08:00
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mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
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2015-01-07 02:00:21 +08:00
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public:
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2016-02-06 02:29:17 +08:00
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GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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2016-05-19 06:04:49 +08:00
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StringRef FS, TargetOptions Options,
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2017-08-03 10:16:21 +08:00
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Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL, bool JIT);
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2015-02-12 01:11:51 +08:00
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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2016-06-24 14:30:11 +08:00
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2018-07-12 04:59:01 +08:00
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const GCNSubtarget *getSubtargetImpl(const Function &) const override;
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2017-11-29 07:40:12 +08:00
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2018-05-31 06:55:35 +08:00
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TargetTransformInfo getTargetTransformInfo(const Function &F) override;
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2017-11-29 07:40:12 +08:00
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bool useIPRA() const override {
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return true;
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}
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2019-03-15 06:54:43 +08:00
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yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
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yaml::MachineFunctionInfo *
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convertFuncInfoToYAML(const MachineFunction &MF) const override;
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bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
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PerFunctionMIParsingState &PFS,
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SMDiagnostic &Error,
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SMRange &SourceRange) const override;
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2015-01-07 02:00:21 +08:00
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};
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2016-12-10 06:06:55 +08:00
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} // end namespace llvm
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2012-12-12 05:25:42 +08:00
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2016-12-10 06:06:55 +08:00
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
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