2016-01-27 02:22:50 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx | FileCheck %s
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2010-08-12 10:06:36 +08:00
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@x = common global <8 x float> zeroinitializer, align 32
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@y = common global <4 x double> zeroinitializer, align 32
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2011-08-09 11:04:23 +08:00
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@z = common global <4 x float> zeroinitializer, align 16
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2010-08-12 10:06:36 +08:00
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2011-08-09 11:04:23 +08:00
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define void @zero128() nounwind ssp {
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2016-01-27 02:22:50 +08:00
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; CHECK-LABEL: zero128:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: movq _z@{{.*}}(%rip), %rax
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; CHECK-NEXT: vmovaps %xmm0, (%rax)
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; CHECK-NEXT: retq
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2011-08-09 11:04:23 +08:00
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store <4 x float> zeroinitializer, <4 x float>* @z, align 16
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ret void
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}
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define void @zero256() nounwind ssp {
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2016-01-27 02:22:50 +08:00
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; CHECK-LABEL: zero256:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movq _x@{{.*}}(%rip), %rax
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2016-05-08 15:10:54 +08:00
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; CHECK-NEXT: vxorps %ymm0, %ymm0, %ymm0
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2016-01-27 02:22:50 +08:00
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; CHECK-NEXT: vmovaps %ymm0, (%rax)
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; CHECK-NEXT: movq _y@{{.*}}(%rip), %rax
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; CHECK-NEXT: vmovaps %ymm0, (%rax)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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2010-08-12 10:06:36 +08:00
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store <8 x float> zeroinitializer, <8 x float>* @x, align 32
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store <4 x double> zeroinitializer, <4 x double>* @y, align 32
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ret void
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}
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2011-07-26 07:05:32 +08:00
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define void @ones([0 x float]* nocapture %RET, [0 x float]* nocapture %aFOO) nounwind {
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2016-01-27 02:22:50 +08:00
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; CHECK-LABEL: ones:
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; CHECK: ## BB#0: ## %allocas
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; CHECK-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: vmovaps %ymm0, (%rdi)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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2011-07-26 07:05:32 +08:00
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allocas:
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%ptr2vec615 = bitcast [0 x float]* %RET to <8 x float>*
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store <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float
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0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float
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0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, <8 x
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float>* %ptr2vec615, align 32
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ret void
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}
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2011-08-02 03:51:53 +08:00
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define void @ones2([0 x i32]* nocapture %RET, [0 x i32]* nocapture %aFOO) nounwind {
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2016-01-27 02:22:50 +08:00
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; CHECK-LABEL: ones2:
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; CHECK: ## BB#0: ## %allocas
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; CHECK-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: vmovaps %ymm0, (%rdi)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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2011-08-02 03:51:53 +08:00
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allocas:
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%ptr2vec615 = bitcast [0 x i32]* %RET to <8 x i32>*
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store <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <8 x i32>* %ptr2vec615, align 32
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ret void
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}
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2011-08-12 02:59:13 +08:00
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;;; Just make sure this doesn't crash
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define <4 x i64> @ISelCrash(<4 x i64> %a) nounwind uwtable readnone ssp {
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2016-01-27 02:22:50 +08:00
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; CHECK-LABEL: ISelCrash:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
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; CHECK-NEXT: retq
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2011-08-12 02:59:13 +08:00
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%shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 4, i32 4>
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ret <4 x i64> %shuffle
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}
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Instead of always leaving the work to the generic legalizer when
there is no support for native 256-bit shuffles, be more smart in some
cases, for example, when you can extract specific 128-bit parts and use
regular 128-bit shuffles for them. Example:
For this shuffle:
shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32>
<i32 1, i32 0, i32 7, i32 6>
This was expanded to:
vextractf128 $1, %ymm1, %xmm2
vpextrq $0, %xmm2, %rax
vmovd %rax, %xmm1
vpextrq $1, %xmm2, %rax
vmovd %rax, %xmm2
vpunpcklqdq %xmm1, %xmm2, %xmm1
vpextrq $0, %xmm0, %rax
vmovd %rax, %xmm2
vpextrq $1, %xmm0, %rax
vmovd %rax, %xmm0
vpunpcklqdq %xmm2, %xmm0, %xmm0
vinsertf128 $1, %xmm1, %ymm0, %ymm0
ret
Now we get:
vshufpd $1, %xmm0, %xmm0, %xmm0
vextractf128 $1, %ymm1, %xmm1
vshufpd $1, %xmm1, %xmm1, %xmm1
vinsertf128 $1, %xmm1, %ymm0, %ymm0
llvm-svn: 137733
2011-08-17 02:21:54 +08:00
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|
2011-09-13 06:59:23 +08:00
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;;; Don't crash on movd
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define <8 x i32> @VMOVZQI2PQI([0 x float]* nocapture %aFOO) nounwind {
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2016-01-27 02:22:50 +08:00
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; CHECK-LABEL: VMOVZQI2PQI:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
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; CHECK-NEXT: retq
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2011-09-13 06:59:23 +08:00
|
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|
%ptrcast.i33.i = bitcast [0 x float]* %aFOO to i32*
|
2015-02-28 05:17:42 +08:00
|
|
|
%val.i34.i = load i32, i32* %ptrcast.i33.i, align 4
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%ptroffset.i22.i992 = getelementptr [0 x float], [0 x float]* %aFOO, i64 0, i64 1
|
2011-09-13 06:59:23 +08:00
|
|
|
%ptrcast.i23.i = bitcast float* %ptroffset.i22.i992 to i32*
|
2015-02-28 05:17:42 +08:00
|
|
|
%val.i24.i = load i32, i32* %ptrcast.i23.i, align 4
|
2011-09-13 06:59:23 +08:00
|
|
|
%updatedret.i30.i = insertelement <8 x i32> undef, i32 %val.i34.i, i32 1
|
|
|
|
|
ret <8 x i32> %updatedret.i30.i
|
|
|
|
|
}
|
|
|
|
|
|
2011-12-15 09:02:25 +08:00
|
|
|
;;;; Don't crash on fneg
|
|
|
|
|
; rdar://10566486
|
2012-09-10 06:58:45 +08:00
|
|
|
define <16 x float> @fneg(<16 x float> %a) nounwind {
|
2016-01-27 02:22:50 +08:00
|
|
|
; CHECK-LABEL: fneg:
|
|
|
|
|
; CHECK: ## BB#0:
|
2016-08-29 12:49:31 +08:00
|
|
|
; CHECK-NEXT: vmovaps {{.*#+}} ymm2 = [-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00]
|
2016-01-27 02:22:50 +08:00
|
|
|
; CHECK-NEXT: vxorps %ymm2, %ymm0, %ymm0
|
|
|
|
|
; CHECK-NEXT: vxorps %ymm2, %ymm1, %ymm1
|
|
|
|
|
; CHECK-NEXT: retq
|
2012-09-10 06:58:45 +08:00
|
|
|
%1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a
|
2011-12-15 09:02:25 +08:00
|
|
|
ret <16 x float> %1
|
|
|
|
|
}
|
2011-12-16 05:34:44 +08:00
|
|
|
|
|
|
|
|
;;; Don't crash on build vector
|
|
|
|
|
define <16 x i16> @build_vec_16x16(i16 %a) nounwind readonly {
|
2016-01-27 02:22:50 +08:00
|
|
|
; CHECK-LABEL: build_vec_16x16:
|
|
|
|
|
; CHECK: ## BB#0:
|
|
|
|
|
; CHECK-NEXT: movzwl %di, %eax
|
|
|
|
|
; CHECK-NEXT: vmovd %eax, %xmm0
|
|
|
|
|
; CHECK-NEXT: retq
|
2011-12-16 05:34:44 +08:00
|
|
|
%res = insertelement <16 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a, i32 0
|
|
|
|
|
ret <16 x i16> %res
|
|
|
|
|
}
|
2013-05-01 21:00:16 +08:00
|
|
|
|
2013-10-08 13:53:50 +08:00
|
|
|
;;; Check that VMOVPQIto64rr generates the assembly string "vmovq". Previously
|
2013-05-01 21:00:16 +08:00
|
|
|
;;; an incorrect mnemonic of "movd" was printed for this instruction.
|
|
|
|
|
define i64 @VMOVPQIto64rr(<2 x i64> %a) {
|
2016-01-27 02:22:50 +08:00
|
|
|
; CHECK-LABEL: VMOVPQIto64rr:
|
|
|
|
|
; CHECK: ## BB#0:
|
|
|
|
|
; CHECK-NEXT: vmovq %xmm0, %rax
|
|
|
|
|
; CHECK-NEXT: retq
|
2013-05-01 21:00:16 +08:00
|
|
|
%vecext.i = extractelement <2 x i64> %a, i32 0
|
|
|
|
|
ret i64 %vecext.i
|
|
|
|
|
}
|
2015-03-05 14:38:42 +08:00
|
|
|
|
|
|
|
|
; PR22685
|
|
|
|
|
define <8 x float> @mov00_8f32(float* %ptr) {
|
2016-01-27 02:22:50 +08:00
|
|
|
; CHECK-LABEL: mov00_8f32:
|
|
|
|
|
; CHECK: ## BB#0:
|
|
|
|
|
; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
|
|
|
|
|
; CHECK-NEXT: retq
|
2015-03-05 14:38:42 +08:00
|
|
|
%val = load float, float* %ptr
|
|
|
|
|
%vec = insertelement <8 x float> zeroinitializer, float %val, i32 0
|
|
|
|
|
ret <8 x float> %vec
|
|
|
|
|
}
|