llvm-project/llvm/test/MC/Mips/mips32r5/invalid-mips32.s

# Instructions that are invalid
#
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 \
# RUN:     2>%t1
# RUN: FileCheck %s < %t1

	.set noat
        eretnc                      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
[mips] Added support for the ERETNC instruction. Summary: This required adding the instruction predicate HasMips32r5. Patch by Scott Egerton. Reviewers: dsanders, vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11136 llvm-svn: 242666 2015-07-20 20:28:56 +08:00			`# Instructions that are invalid`
			`#`
			`# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 \`
			`# RUN: 2>%t1`
			`# RUN: FileCheck %s < %t1`

			`.set noat`
			`eretnc # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled`