maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/MC/Mips/macro-ddivu.s

Ignoring revisions in .git-blame-ignore-revs. Click here to bypass and see the normal blame view.

302 lines
17 KiB
ArmAsm
Raw Normal View History

[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | \
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 \
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
ddivu $25,$11
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# CHECK-NOTRAP: bne $11, $zero, .Ltmp0 # encoding: [0x15,0x60,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp0-4, kind: fixup_Mips_PC16
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
# CHECK-NOTRAP: ddivu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# CHECK-NOTRAP: .Ltmp0
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
# CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
# CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1f]
# CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
ddivu $24,$12
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# CHECK-NOTRAP: bne $12, $zero, .Ltmp1 # encoding: [0x15,0x80,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
# CHECK-NOTRAP: ddivu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# CHECK-NOTRAP: .Ltmp1
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
# CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
# CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1f]
# CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
ddivu $25,$0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
ddivu $0,$9
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# CHECK-NOTRAP: bne $9, $zero, .Ltmp2 # encoding: [0x15,0x20,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp2-4, kind: fixup_Mips_PC16
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
# CHECK-NOTRAP: ddivu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# CHECK-NOTRAP: .Ltmp2
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
# CHECK-NOTRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
# CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1f]
# CHECK-TRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12]
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
ddivu $0,$0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddivu $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddivu $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddivu $4,1
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# CHECK-NOTRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x25]
# CHECK-TRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x25]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $4,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x34,0x01,0x80,0x00]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x34,0x01,0x80,0x00]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x24,0x01,0x80,0x00]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x24,0x01,0x80,0x00]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $4,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0x34,0x21,0xa5,0xa5]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0x34,0x21,0xa5,0xa5]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,0xfffffff
# CHECK-NOTRAP: lui $1, 4095 # encoding: [0x3c,0x01,0x0f,0xff]
# CHECK-NOTRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 4095 # encoding: [0x3c,0x01,0x0f,0xff]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,0x10000000
# CHECK-NOTRAP: lui $1, 4096 # encoding: [0x3c,0x01,0x10,0x00]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 4096 # encoding: [0x3c,0x01,0x10,0x00]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,0xfffffffe
# CHECK-NOTRAP: ori $1, $zero, 65535 # encoding: [0x34,0x01,0xff,0xff]
# CHECK-NOTRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-NOTRAP: ori $1, $1, 65534 # encoding: [0x34,0x21,0xff,0xfe]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: ori $1, $zero, 65535 # encoding: [0x34,0x01,0xff,0xff]
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65534 # encoding: [0x34,0x21,0xff,0xfe]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,0xffffffff
# CHECK-NOTRAP: lui $1, 65535 # encoding: [0x3c,0x01,0xff,0xff]
# CHECK-NOTRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 65535 # encoding: [0x3c,0x01,0xff,0xff]
# CHECK-TRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,0xfffffffff
# CHECK-NOTRAP: addiu $1, $zero, 15 # encoding: [0x24,0x01,0x00,0x0f]
# CHECK-NOTRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-NOTRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-NOTRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-NOTRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: addiu $1, $zero, 15 # encoding: [0x24,0x01,0x00,0x0f]
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,$5,$6
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# CHECK-NOTRAP: bne $6, $zero, .Ltmp3 # encoding: [0x14,0xc0,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16
[mips] Addition of a third operand to the instructions [d]div, [d]divu Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
2016-05-16 16:57:59 +08:00
# CHECK-NOTRAP: ddivu $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# CHECK-NOTRAP: .Ltmp3:
[mips] Addition of a third operand to the instructions [d]div, [d]divu Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
2016-05-16 16:57:59 +08:00
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
[mips] Addition of a third operand to the instructions [d]div, [d]divu Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
2016-05-16 16:57:59 +08:00
ddivu $4,$5,$0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
[mips] Addition of a third operand to the instructions [d]div, [d]divu Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
2016-05-16 16:57:59 +08:00
ddivu $4,$0,$0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
[mips] Addition of a third operand to the instructions [d]div, [d]divu Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
2016-05-16 16:57:59 +08:00
ddivu $0, $4, $5
# CHECK-NOTRAP: ddivu $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1f]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
# CHECK-TRAP: ddivu $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1f]
[mips] Addition of a third operand to the instructions [d]div, [d]divu Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
2016-05-16 16:57:59 +08:00
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $0,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $4,$5,1
[mips] divide macro instruction cleanup. Clean up the implementation of divide macro expansion by getting rid of a FIXME regarding magic numbers and branch instructions. Match GAS' behaviour for expansion of ddiv / div in the two and three operand cases. Add the two operand alias for MIPSR6. Finally, optimize macro expansion cases where the divisior is the $zero register. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D29887 llvm-svn: 294960
2017-02-14 00:06:48 +08:00
# CHECK-NOTRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x25]
# CHECK-TRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x25]
[mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 llvm-svn: 246763
2015-09-03 20:31:22 +08:00
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $4,$5,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
[mips] Addition of a third operand to the instructions [d]div, [d]divu Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
2016-05-16 16:57:59 +08:00
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
[mips] Addition of a third operand to the instructions [d]div, [d]divu Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
2016-05-16 16:57:59 +08:00
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $4,$5,0x8000
# CHECK-NOTRAP: ori $1, $zero, 32768 # encoding: [0x34,0x01,0x80,0x00]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: ori $1, $zero, 32768 # encoding: [0x34,0x01,0x80,0x00]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
[mips] Addition of a third operand to the instructions [d]div, [d]divu Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
2016-05-16 16:57:59 +08:00
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $4,$5,-0x8000
# CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x24,0x01,0x80,0x00]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: addiu $1, $zero, -32768 # encoding: [0x24,0x01,0x80,0x00]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
[mips] Addition of a third operand to the instructions [d]div, [d]divu Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 llvm-svn: 269636
2016-05-16 16:57:59 +08:00
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
[mips] Addition of the immediate cases for the instructions [d]div, [d]divu Related to http://reviews.llvm.org/D15772 Depends on http://reviews.llvm.org/D16888 Adds support for immediate operand for [D]DIV[U] instructions. Patch By: Srdjan Obucina Reviewers: zoran.jovanovic, vkalintiris, dsanders, obucina Differential Revision: https://reviews.llvm.org/D16889 llvm-svn: 293614
2017-01-31 18:49:24 +08:00
ddivu $4,$5,0x10000
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,$5,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0x34,0x21,0xa5,0xa5]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0x34,0x21,0xa5,0xa5]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,$5,0xfffffff
# CHECK-NOTRAP: lui $1, 4095 # encoding: [0x3c,0x01,0x0f,0xff]
# CHECK-NOTRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 4095 # encoding: [0x3c,0x01,0x0f,0xff]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,$5,0x10000000
# CHECK-NOTRAP: lui $1, 4096 # encoding: [0x3c,0x01,0x10,0x00]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 4096 # encoding: [0x3c,0x01,0x10,0x00]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,$5,0xfffffffe
# CHECK-NOTRAP: ori $1, $zero, 65535 # encoding: [0x34,0x01,0xff,0xff]
# CHECK-NOTRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-NOTRAP: ori $1, $1, 65534 # encoding: [0x34,0x21,0xff,0xfe]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: ori $1, $zero, 65535 # encoding: [0x34,0x01,0xff,0xff]
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65534 # encoding: [0x34,0x21,0xff,0xfe]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,$5,0xffffffff
# CHECK-NOTRAP: lui $1, 65535 # encoding: [0x3c,0x01,0xff,0xff]
# CHECK-NOTRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 65535 # encoding: [0x3c,0x01,0xff,0xff]
# CHECK-TRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,$5,0xfffffffff
# CHECK-NOTRAP: addiu $1, $zero, 15 # encoding: [0x24,0x01,0x00,0x0f]
# CHECK-NOTRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-NOTRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-NOTRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-NOTRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: addiu $1, $zero, 15 # encoding: [0x24,0x01,0x00,0x0f]
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]