maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/clang/test/Preprocessor/x86_target_features.c

36 lines
1.4 KiB
C
Raw Normal View History

More x86 target feature support. - Apologies for the extremely gross code duplication, I want to get this working and then decide how to get this information out of the back end. - This replaces -m[no-]sse4[12] by -m[no-]sse4, it appears gcc doesn't distinguish them? - -msse, etc. now properly disable/enable related features. - Don't always define __SSE3__... - The main missing functionality bit here is that we don't initialize the features based on the CPU for all -march options. llvm-svn: 71117
2009-05-07 05:07:50 +08:00
// FIXME: Use -triple, not -ccc-host-triple.
// RUN: clang -ccc-host-triple i386-unknown-unknown -march=core2 -msse4 -x c -E -dM -o %t %s &&
// RUN: grep '#define __SSE2_MATH__ 1' %t &&
// RUN: grep '#define __SSE2__ 1' %t &&
// RUN: grep '#define __SSE3__ 1' %t &&
// RUN: grep '#define __SSE4_1__ 1' %t &&
// RUN: grep '#define __SSE4_2__ 1' %t &&
// RUN: grep '#define __SSE_MATH__ 1' %t &&
// RUN: grep '#define __SSE__ 1' %t &&
// RUN: grep '#define __SSSE3__ 1' %t &&
// RUN: clang -ccc-host-triple i386-unknown-unknown -march=core2 -msse4 -mno-sse2 -x c -E -dM -o %t %s &&
// RUN: grep '#define __SSE2_MATH__ 1' %t | count 0 &&
// RUN: grep '#define __SSE2__ 1' %t | count 0 &&
// RUN: grep '#define __SSE3__ 1' %t | count 0 &&
// RUN: grep '#define __SSE4_1__ 1' %t | count 0 &&
// RUN: grep '#define __SSE4_2__ 1' %t | count 0 &&
// RUN: grep '#define __SSE_MATH__ 1' %t &&
// RUN: grep '#define __SSE__ 1' %t &&
// RUN: grep '#define __SSSE3__ 1' %t | count 0 &&
Handle -march for the LLVM recognized cpu names. - x86 target feature handling should not be feature complete, even if the code quality is lacking. llvm-svn: 71123
2009-05-07 05:56:32 +08:00
// RUN: clang -ccc-host-triple i386-unknown-unknown -march=pentium-m -x c -E -dM -o %t %s &&
// RUN: grep '#define __SSE2_MATH__ 1' %t &&
// RUN: grep '#define __SSE2__ 1' %t &&
// RUN: grep '#define __SSE3__ 1' %t | count 0 &&
// RUN: grep '#define __SSE4_1__ 1' %t | count 0 &&
// RUN: grep '#define __SSE4_2__ 1' %t | count 0 &&
// RUN: grep '#define __SSE_MATH__ 1' %t &&
// RUN: grep '#define __SSE__ 1' %t &&
// RUN: grep '#define __SSSE3__ 1' %t | count 0 &&
More x86 target feature support. - Apologies for the extremely gross code duplication, I want to get this working and then decide how to get this information out of the back end. - This replaces -m[no-]sse4[12] by -m[no-]sse4, it appears gcc doesn't distinguish them? - -msse, etc. now properly disable/enable related features. - Don't always define __SSE3__... - The main missing functionality bit here is that we don't initialize the features based on the CPU for all -march options. llvm-svn: 71117
2009-05-07 05:07:50 +08:00
// RUN: true