2015-06-30 07:51:55 +08:00
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//===-- WebAssemblyMCTargetDesc.cpp - WebAssembly Target Descriptions -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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2018-05-01 23:54:18 +08:00
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/// This file provides WebAssembly-specific target descriptions.
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2015-06-30 07:51:55 +08:00
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssemblyMCTargetDesc.h"
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#include "InstPrinter/WebAssemblyInstPrinter.h"
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#include "WebAssemblyMCAsmInfo.h"
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2016-01-13 04:30:51 +08:00
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#include "WebAssemblyTargetStreamer.h"
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2015-06-30 07:51:55 +08:00
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-mc-target-desc"
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2015-07-23 05:28:15 +08:00
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#define GET_INSTRINFO_MC_DESC
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#include "WebAssemblyGenInstrInfo.inc"
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2015-06-30 07:51:55 +08:00
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#define GET_SUBTARGETINFO_MC_DESC
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#include "WebAssemblyGenSubtargetInfo.inc"
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2015-07-11 02:23:10 +08:00
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#define GET_REGINFO_MC_DESC
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#include "WebAssemblyGenRegisterInfo.inc"
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2016-01-08 08:43:54 +08:00
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static MCAsmInfo *createMCAsmInfo(const MCRegisterInfo & /*MRI*/,
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const Triple &TT) {
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2015-07-29 01:23:07 +08:00
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return new WebAssemblyMCAsmInfo(TT);
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2015-06-30 07:51:55 +08:00
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}
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2016-01-08 08:43:54 +08:00
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static MCInstrInfo *createMCInstrInfo() {
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2015-11-06 03:28:16 +08:00
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MCInstrInfo *X = new MCInstrInfo();
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InitWebAssemblyMCInstrInfo(X);
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return X;
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}
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2016-01-13 05:27:55 +08:00
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static MCRegisterInfo *createMCRegisterInfo(const Triple & /*T*/) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitWebAssemblyMCRegisterInfo(X, 0);
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return X;
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}
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2016-01-08 08:43:54 +08:00
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static MCInstPrinter *createMCInstPrinter(const Triple & /*T*/,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI) {
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2016-01-20 13:54:22 +08:00
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assert(SyntaxVariant == 0 && "WebAssembly only has one syntax variant");
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2015-07-29 01:23:07 +08:00
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return new WebAssemblyInstPrinter(MAI, MII, MRI);
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2015-06-30 07:51:55 +08:00
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}
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2016-01-08 08:43:54 +08:00
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static MCCodeEmitter *createCodeEmitter(const MCInstrInfo &MCII,
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const MCRegisterInfo & /*MRI*/,
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2017-02-10 08:14:42 +08:00
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MCContext &Ctx) {
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2017-06-17 07:59:10 +08:00
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return createWebAssemblyMCCodeEmitter(MCII);
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2016-01-08 08:43:54 +08:00
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}
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static MCAsmBackend *createAsmBackend(const Target & /*T*/,
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2018-01-03 17:30:39 +08:00
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const MCSubtargetInfo &STI,
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const MCRegisterInfo & /*MRI*/,
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2016-07-26 05:41:42 +08:00
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const MCTargetOptions & /*Options*/) {
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2018-01-03 17:30:39 +08:00
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return createWebAssemblyAsmBackend(STI.getTargetTriple());
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2016-01-08 08:43:54 +08:00
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}
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2016-01-12 11:30:06 +08:00
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static MCSubtargetInfo *createMCSubtargetInfo(const Triple &TT, StringRef CPU,
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StringRef FS) {
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return createWebAssemblyMCSubtargetInfoImpl(TT, CPU, FS);
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}
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2016-01-13 04:30:51 +08:00
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static MCTargetStreamer *
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2017-02-22 09:23:18 +08:00
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createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
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return new WebAssemblyTargetWasmStreamer(S);
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2016-01-13 04:30:51 +08:00
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}
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static MCTargetStreamer *createAsmTargetStreamer(MCStreamer &S,
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formatted_raw_ostream &OS,
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MCInstPrinter * /*InstPrint*/,
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bool /*isVerboseAsm*/) {
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return new WebAssemblyTargetAsmStreamer(S, OS);
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}
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2015-06-30 07:51:55 +08:00
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// Force static initialization.
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extern "C" void LLVMInitializeWebAssemblyTargetMC() {
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2016-10-10 07:00:34 +08:00
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for (Target *T :
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{&getTheWebAssemblyTarget32(), &getTheWebAssemblyTarget64()}) {
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2015-06-30 07:51:55 +08:00
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// Register the MC asm info.
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2016-01-08 08:43:54 +08:00
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RegisterMCAsmInfoFn X(*T, createMCAsmInfo);
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2015-06-30 07:51:55 +08:00
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2015-11-06 03:28:16 +08:00
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// Register the MC instruction info.
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2016-01-08 08:43:54 +08:00
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TargetRegistry::RegisterMCInstrInfo(*T, createMCInstrInfo);
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2015-11-06 03:28:16 +08:00
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2016-01-13 05:27:55 +08:00
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(*T, createMCRegisterInfo);
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2015-06-30 07:51:55 +08:00
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// Register the MCInstPrinter.
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2016-01-08 08:43:54 +08:00
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TargetRegistry::RegisterMCInstPrinter(*T, createMCInstPrinter);
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2015-12-17 09:39:00 +08:00
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2016-01-08 09:18:00 +08:00
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// Register the MC code emitter.
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2016-01-08 08:43:54 +08:00
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TargetRegistry::RegisterMCCodeEmitter(*T, createCodeEmitter);
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2015-12-17 09:39:00 +08:00
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2016-01-08 09:18:00 +08:00
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// Register the ASM Backend.
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2016-01-08 08:43:54 +08:00
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TargetRegistry::RegisterMCAsmBackend(*T, createAsmBackend);
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2016-01-12 11:30:06 +08:00
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(*T, createMCSubtargetInfo);
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2016-01-13 04:30:51 +08:00
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// Register the object target streamer.
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TargetRegistry::RegisterObjectTargetStreamer(*T,
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createObjectTargetStreamer);
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// Register the asm target streamer.
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TargetRegistry::RegisterAsmTargetStreamer(*T, createAsmTargetStreamer);
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2015-06-30 07:51:55 +08:00
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}
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}
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2016-10-25 07:27:49 +08:00
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2017-03-15 04:23:22 +08:00
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wasm::ValType WebAssembly::toValType(const MVT &Ty) {
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2016-10-25 07:27:49 +08:00
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switch (Ty.SimpleTy) {
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2018-09-05 09:27:38 +08:00
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case MVT::i32:
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return wasm::ValType::I32;
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case MVT::i64:
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return wasm::ValType::I64;
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case MVT::f32:
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return wasm::ValType::F32;
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case MVT::f64:
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return wasm::ValType::F64;
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2018-09-21 06:04:44 +08:00
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case MVT::v16i8:
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case MVT::v8i16:
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case MVT::v4i32:
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case MVT::v2i64:
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case MVT::v4f32:
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case MVT::v2f64:
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return wasm::ValType::V128;
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2018-09-05 09:27:38 +08:00
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case MVT::ExceptRef:
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return wasm::ValType::EXCEPT_REF;
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default:
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llvm_unreachable("unexpected type");
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2016-10-25 07:27:49 +08:00
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}
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}
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