forked from OSchip/llvm-project
151 lines
4.0 KiB
LLVM
151 lines
4.0 KiB
LLVM
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; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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declare i32 @llvm.x86.avx.ptestz.256(<4 x i64> %p1, <4 x i64> %p2) nounwind
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declare i32 @llvm.x86.avx.ptestc.256(<4 x i64> %p1, <4 x i64> %p2) nounwind
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define <4 x float> @test1(<4 x i64> %a, <4 x float> %b) nounwind {
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entry:
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; CHECK: test1:
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; CHECK: vptest
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; CHECK-NEXT: jne
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; CHECK: ret
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%res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a, <4 x i64> %a) nounwind
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%one = icmp ne i32 %res, 0
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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define <4 x float> @test3(<4 x i64> %a, <4 x float> %b) nounwind {
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entry:
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; CHECK: test3:
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; CHECK: vptest
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; CHECK-NEXT: jne
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; CHECK: ret
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%res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a, <4 x i64> %a) nounwind
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%one = trunc i32 %res to i1
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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define <4 x float> @test4(<4 x i64> %a, <4 x float> %b) nounwind {
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entry:
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; CHECK: test4:
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; CHECK: vptest
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; CHECK-NEXT: jae
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; CHECK: ret
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%res = call i32 @llvm.x86.avx.ptestc.256(<4 x i64> %a, <4 x i64> %a) nounwind
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%one = icmp ne i32 %res, 0
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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define <4 x float> @test6(<4 x i64> %a, <4 x float> %b) nounwind {
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entry:
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; CHECK: test6:
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; CHECK: vptest
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; CHECK-NEXT: jae
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; CHECK: ret
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%res = call i32 @llvm.x86.avx.ptestc.256(<4 x i64> %a, <4 x i64> %a) nounwind
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%one = trunc i32 %res to i1
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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define <4 x float> @test7(<4 x i64> %a, <4 x float> %b) nounwind {
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entry:
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; CHECK: test7:
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; CHECK: vptest
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; CHECK-NEXT: jne
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; CHECK: ret
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%res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a, <4 x i64> %a) nounwind
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%one = icmp eq i32 %res, 1
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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define <4 x float> @test8(<4 x i64> %a, <4 x float> %b) nounwind {
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entry:
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; CHECK: test8:
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; CHECK: vptest
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; CHECK-NEXT: je
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; CHECK: ret
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%res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a, <4 x i64> %a) nounwind
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%one = icmp ne i32 %res, 1
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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