llvm-project/llvm/lib/Target/AVR/AVR.td

Ignoring revisions in .git-blame-ignore-revs. Click here to bypass and see the normal blame view.

81 lines
2.7 KiB
TableGen
Raw Normal View History

//===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===---------------------------------------------------------------------===//
// This is the top level entry point for the AVR target.
//===---------------------------------------------------------------------===//
//===---------------------------------------------------------------------===//
// Target-independent interfaces which we are implementing
//===---------------------------------------------------------------------===//
include "llvm/Target/Target.td"
//===---------------------------------------------------------------------===//
// AVR Device Definitions
//===---------------------------------------------------------------------===//
include "AVRDevices.td"
//===---------------------------------------------------------------------===//
// Register File Description
//===---------------------------------------------------------------------===//
include "AVRRegisterInfo.td"
//===---------------------------------------------------------------------===//
// Instruction Descriptions
//===---------------------------------------------------------------------===//
include "AVRInstrInfo.td"
def AVRInstrInfo : InstrInfo;
//===---------------------------------------------------------------------===//
// Calling Conventions
//===---------------------------------------------------------------------===//
include "AVRCallingConv.td"
//===---------------------------------------------------------------------===//
// Assembly Printers
//===---------------------------------------------------------------------===//
def AVRAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
//===---------------------------------------------------------------------===//
// Assembly Parsers
//===---------------------------------------------------------------------===//
def AVRAsmParser : AsmParser {
let ShouldEmitMatchRegisterName = 1;
let ShouldEmitMatchRegisterAltName = 1;
}
def AVRAsmParserVariant : AsmParserVariant {
int Variant = 0;
// Recognize hard coded registers.
string RegisterPrefix = "$";
string TokenizingCharacters = "+";
}
//===---------------------------------------------------------------------===//
// Target Declaration
//===---------------------------------------------------------------------===//
def AVR : Target {
let InstructionSet = AVRInstrInfo;
let AssemblyWriters = [AVRAsmWriter];
let AssemblyParsers = [AVRAsmParser];
let AssemblyParserVariants = [AVRAsmParserVariant];
}