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llvm-project/llvm/test/CodeGen/Hexagon/switch-lut-explicit-section.ll

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[Hexagon] Emit lookup tables in text section based on a flag The flag "-hexagon-emit-lut-text" (defaulted to false) is added to decide on where to keep the switch generated lookup table. Differential Revision: https://reviews.llvm.org/D34818 llvm-svn: 308316
2017-07-18 23:31:37 +08:00
;RUN: llc -O2 -hexagon-emit-lut-text=true < %s | FileCheck --check-prefix=FUNCTEXT %s
;RUN: llc -O2 -hexagon-emit-lut-text=true -function-sections < %s | FileCheck --check-prefix=FUNCTEXT %s
;This test checks the placement of lookup table in explicit section from the attribute set.
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon-unknown--elf"
;FUNCTEXT: .text
;FUNCTEXT: .section{{.*}}tcm.hexagon,
;FUNCTEXT-NOT: .section{{.*}}.rodata
;FUNCTEXT-NOT: .text
;FUNCTEXT: .Lswitch.table:
;FUNCTEXT-NEXT: .word
@switch.table = private unnamed_addr constant [9 x i32] [i32 9, i32 20, i32 14, i32 22, i32 12, i32 5, i32 98, i32 8, i32 11] #0
; Function Attrs: norecurse nounwind readnone
define i32 @foo(i32 %x) local_unnamed_addr #0 section "tcm.hexagon" {
entry:
%0 = icmp ult i32 %x, 9
br i1 %0, label %switch.lookup, label %return
switch.lookup: ; preds = %entry
%switch.gep = getelementptr inbounds [9 x i32], [9 x i32]* @switch.table, i32 0, i32 %x
%switch.load = load i32, i32* %switch.gep, align 4
ret i32 %switch.load
return: ; preds = %entry
ret i32 19
}
[Hexagon] New HVX target features. This patch lets the llvm tools handle the new HVX target features that are added by frontend (clang). The target-features are of the form "hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX. "hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated. The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}. Eg: "+hvxv62" For the correct HVX code generation, the user must use the following target features. For 64B mode: "+hvxv62" "+hvx-length64b" For 128B mode: "+hvxv62" "+hvx-length128b" Clang picks a default length if none is specified. If for some reason, no hvx-length is specified to llvm, the compilation will bail out. There is a corresponding clang patch. Differential Revision: https://reviews.llvm.org/D38851 llvm-svn: 316101
2017-10-19 02:07:07 +08:00
attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="-hvx,-long-calls" "unsafe-fp-math"="false" "use-soft-float"="false" }