forked from OSchip/llvm-project
90 lines
3.9 KiB
LLVM
90 lines
3.9 KiB
LLVM
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; RUN: llc -march=hexagon -O2 -mcpu=hexagonv60 < %s | FileCheck %s
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; Look for an instruction, we really just do not want to see an abort.
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; CHECK: trace_event
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; REQUIRES: asserts
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target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a:0-n16:32"
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target triple = "hexagon-unknown--elf"
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; Function Attrs: nounwind
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define void @_ZN6Halide7Runtime8Internal13default_traceEPvPK18halide_trace_event() #0 {
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entry:
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br i1 undef, label %if.then, label %if.else
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if.then: ; preds = %entry
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br label %while.cond
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while.cond: ; preds = %while.cond, %if.then
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br i1 undef, label %while.cond, label %while.end
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while.end: ; preds = %while.cond
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%add = add i32 undef, 48
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br i1 undef, label %if.end, label %if.then17
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if.then17: ; preds = %while.end
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unreachable
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if.end: ; preds = %while.end
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%arrayidx21 = getelementptr inbounds [4096 x i8], [4096 x i8]* undef, i32 0, i32 8
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store i8 undef, i8* %arrayidx21, align 4, !tbaa !1
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br i1 undef, label %for.body42.preheader6, label %min.iters.checked
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for.body42.preheader6: ; preds = %vector.body.preheader, %min.iters.checked, %if.end
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unreachable
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min.iters.checked: ; preds = %if.end
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br i1 undef, label %for.body42.preheader6, label %vector.body.preheader
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vector.body.preheader: ; preds = %min.iters.checked
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br i1 undef, label %for.cond48.preheader, label %for.body42.preheader6
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for.cond48.preheader: ; preds = %vector.body.preheader
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br i1 undef, label %while.cond.i, label %for.body61.lr.ph
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for.body61.lr.ph: ; preds = %for.cond48.preheader
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br i1 undef, label %for.body61, label %min.iters.checked595
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min.iters.checked595: ; preds = %for.body61.lr.ph
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br i1 undef, label %for.body61, label %vector.memcheck608
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vector.memcheck608: ; preds = %min.iters.checked595
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%scevgep600 = getelementptr [4096 x i8], [4096 x i8]* undef, i32 0, i32 %add
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%bound0604 = icmp ule i8* %scevgep600, undef
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%memcheck.conflict607 = and i1 undef, %bound0604
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br i1 %memcheck.conflict607, label %for.body61, label %vector.body590
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vector.body590: ; preds = %vector.body590, %vector.memcheck608
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br i1 undef, label %middle.block591, label %vector.body590, !llvm.loop !4
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middle.block591: ; preds = %vector.body590
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%cmp.n613 = icmp eq i32 undef, 0
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br i1 %cmp.n613, label %while.cond.i, label %for.body61
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while.cond.i: ; preds = %for.body61, %while.cond.i, %middle.block591, %for.cond48.preheader
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br i1 undef, label %_ZN6Halide7Runtime8Internal14ScopedSpinLockC2EPVi.exit, label %while.cond.i
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_ZN6Halide7Runtime8Internal14ScopedSpinLockC2EPVi.exit: ; preds = %while.cond.i
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unreachable
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for.body61: ; preds = %for.body61, %middle.block591, %vector.memcheck608, %min.iters.checked595, %for.body61.lr.ph
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%cmp59 = icmp ult i32 undef, undef
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br i1 %cmp59, label %for.body61, label %while.cond.i, !llvm.loop !7
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if.else: ; preds = %entry
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unreachable
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}
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attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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!llvm.module.flags = !{!0}
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!0 = !{i32 2, !"halide_mattrs", !"+hvx"}
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!1 = !{!2, !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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!4 = distinct !{!4, !5, !6}
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!5 = !{!"llvm.loop.vectorize.width", i32 1}
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!6 = !{!"llvm.loop.interleave.count", i32 1}
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!7 = distinct !{!7, !5, !6}
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