2017-02-01 09:22:51 +08:00
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//===- MipsTargetMachine.h - Define TargetMachine for Mips ------*- C++ -*-===//
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2007-06-06 15:42:06 +08:00
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//
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// The LLVM Compiler Infrastructure
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//
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2007-12-30 04:36:04 +08:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2007-06-06 15:42:06 +08:00
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//
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2011-04-16 05:51:11 +08:00
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//===----------------------------------------------------------------------===//
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2007-06-06 15:42:06 +08:00
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//
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// This file declares the Mips specific subclass of TargetMachine.
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//
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2011-04-16 05:51:11 +08:00
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//===----------------------------------------------------------------------===//
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2007-06-06 15:42:06 +08:00
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2014-08-14 00:26:38 +08:00
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
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#define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
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2007-06-06 15:42:06 +08:00
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2015-02-13 17:09:03 +08:00
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#include "MCTargetDesc/MipsABIInfo.h"
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2012-03-18 02:46:09 +08:00
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#include "MipsSubtarget.h"
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#include "llvm/ADT/Optional.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Support/CodeGen.h"
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2012-12-04 15:12:27 +08:00
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#include "llvm/Target/TargetMachine.h"
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#include <memory>
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2007-06-06 15:42:06 +08:00
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namespace llvm {
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2010-11-15 08:06:54 +08:00
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2017-10-13 06:57:28 +08:00
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class MipsTargetMachine : public LLVMTargetMachine {
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bool isLittle;
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2014-11-13 17:26:31 +08:00
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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2015-01-27 01:33:46 +08:00
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// Selected ABI
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MipsABIInfo ABI;
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2014-07-19 07:41:32 +08:00
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MipsSubtarget *Subtarget;
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MipsSubtarget DefaultSubtarget;
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MipsSubtarget NoMips16Subtarget;
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MipsSubtarget Mips16Subtarget;
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2011-07-22 00:28:51 +08:00
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2014-09-26 09:44:08 +08:00
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mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
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2012-08-01 05:39:17 +08:00
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public:
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2015-06-12 03:41:26 +08:00
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MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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2016-05-19 06:04:49 +08:00
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StringRef FS, const TargetOptions &Options,
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2017-08-03 10:16:21 +08:00
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Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL, bool JIT, bool isLittle);
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2014-11-21 07:37:18 +08:00
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~MipsTargetMachine() override;
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2012-08-01 05:39:17 +08:00
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2017-12-21 10:34:39 +08:00
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TargetIRAnalysis getTargetIRAnalysis() override;
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2013-04-10 03:46:01 +08:00
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2015-03-21 12:22:23 +08:00
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const MipsSubtarget *getSubtargetImpl() const {
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2014-07-19 07:41:32 +08:00
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if (Subtarget)
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return Subtarget;
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return &DefaultSubtarget;
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}
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2014-08-05 05:25:23 +08:00
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2014-09-26 09:44:08 +08:00
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const MipsSubtarget *getSubtargetImpl(const Function &F) const override;
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2014-07-19 07:41:32 +08:00
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/// \brief Reset the subtarget for the Mips target.
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void resetSubtarget(MachineFunction *MF);
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2012-08-01 05:39:17 +08:00
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// Pass Pipeline Configuration
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2014-04-29 15:58:02 +08:00
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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2014-11-13 17:26:31 +08:00
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF.get();
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}
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2015-01-06 09:12:30 +08:00
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bool isLittleEndian() const { return isLittle; }
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2015-01-27 01:33:46 +08:00
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const MipsABIInfo &getABI() const { return ABI; }
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2017-06-01 02:41:23 +08:00
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bool isMachineVerifierClean() const override {
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return false;
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}
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2012-08-01 05:39:17 +08:00
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};
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2008-06-04 09:45:25 +08:00
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2016-05-19 00:00:24 +08:00
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/// Mips32/64 big endian target machine.
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2011-09-21 11:00:58 +08:00
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///
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class MipsebTargetMachine : public MipsTargetMachine {
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2011-12-20 10:50:00 +08:00
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virtual void anchor();
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2017-02-01 09:22:51 +08:00
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2011-09-21 11:00:58 +08:00
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public:
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2015-06-12 03:41:26 +08:00
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MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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2017-08-03 10:16:21 +08:00
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Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL, bool JIT);
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2011-09-21 11:00:58 +08:00
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};
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2016-05-19 00:00:24 +08:00
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/// Mips32/64 little endian target machine.
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2008-06-04 09:45:25 +08:00
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///
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class MipselTargetMachine : public MipsTargetMachine {
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2011-12-20 10:50:00 +08:00
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virtual void anchor();
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2008-06-04 09:45:25 +08:00
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public:
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2015-06-12 03:41:26 +08:00
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MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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2017-08-03 10:16:21 +08:00
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Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL, bool JIT);
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2008-06-04 09:45:25 +08:00
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};
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2017-02-01 09:22:51 +08:00
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} // end namespace llvm
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2007-06-06 15:42:06 +08:00
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2017-02-01 09:22:51 +08:00
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#endif // LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
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