forked from OSchip/llvm-project
123 lines
4.3 KiB
LLVM
123 lines
4.3 KiB
LLVM
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; REQUIRES: asserts
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; RUN: opt < %s -instcombine -licm -loop-unswitch -loop-unswitch-threshold=1000 -enable-mssa-loop-dependency=true -verify-memoryssa -disable-output -stats 2>&1| FileCheck %s
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; Check no loop unswitch is done because unswitching of equality expr with
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; undef is unsafe before the freeze patch is committed.
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; CHECK-NOT: Number of branches unswitched
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define void @ham(i64 %arg) local_unnamed_addr {
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bb:
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%tmp = icmp eq i64 %arg, 0
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br i1 %tmp, label %bb3, label %bb1
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bb1: ; preds = %bb
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%tmp2 = load volatile i64, i64* @global, align 8
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br label %bb3
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bb3: ; preds = %bb1, %bb
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%tmp4 = phi i64 [ %tmp2, %bb1 ], [ undef, %bb ]
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%tmp5 = load i64, i64* @global.1, align 8
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br label %bb6
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bb6: ; preds = %bb21, %bb3
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%tmp7 = phi i64 [ 3, %bb21 ], [ %tmp5, %bb3 ]
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%tmp8 = phi i64 [ %tmp25, %bb21 ], [ 0, %bb3 ]
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%tmp9 = icmp eq i64 %tmp7, %arg
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br i1 %tmp9, label %bb10, label %bb28
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bb10: ; preds = %bb6
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%tmp11 = icmp eq i64 %tmp7, 0
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br i1 %tmp11, label %bb21, label %bb12
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bb12: ; preds = %bb10
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%tmp13 = load i64, i64* @global.2, align 8
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%tmp14 = add nsw i64 %tmp13, 1
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store i64 %tmp14, i64* @global.2, align 8
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%tmp15 = load i64, i64* @global.3, align 8
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%tmp16 = icmp eq i64 %tmp15, %tmp4
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br i1 %tmp16, label %bb17, label %bb21
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bb17: ; preds = %bb12
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%tmp18 = phi i64 [ %tmp15, %bb12 ]
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%tmp19 = load i64, i64* @global.4, align 8
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%tmp20 = add nsw i64 %tmp19, %tmp18
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store i64 %tmp20, i64* @global.5, align 8
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br label %bb29
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bb21: ; preds = %bb12, %bb10
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%tmp22 = load i64, i64* @global.3, align 8
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%tmp23 = load volatile i64, i64* @global, align 8
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%tmp24 = add nsw i64 %tmp23, %tmp22
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store i64 %tmp24, i64* @global.5, align 8
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store i64 3, i64* @global.1, align 8
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%tmp25 = add nsw i64 %tmp8, 1
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%tmp26 = load i64, i64* @global.6, align 8
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%tmp27 = icmp slt i64 %tmp25, %tmp26
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br i1 %tmp27, label %bb6, label %bb28
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bb28: ; preds = %bb21, %bb6
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br label %bb29
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bb29: ; preds = %bb28, %bb17
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ret void
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}
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define void @zot(i64 %arg, i64 %arg1) local_unnamed_addr {
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bb:
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%tmp = icmp eq i64 %arg, 0
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%tmp2 = select i1 %tmp, i64 %arg1, i64 undef
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%tmp3 = load i64, i64* @global.1, align 8
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br label %bb4
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bb4: ; preds = %bb19, %bb
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%tmp5 = phi i64 [ 3, %bb19 ], [ %tmp3, %bb ]
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%tmp6 = phi i64 [ %tmp23, %bb19 ], [ 0, %bb ]
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%tmp7 = icmp eq i64 %tmp5, %arg
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br i1 %tmp7, label %bb8, label %bb26
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bb8: ; preds = %bb4
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%tmp9 = icmp eq i64 %tmp5, 0
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br i1 %tmp9, label %bb19, label %bb10
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bb10: ; preds = %bb8
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%tmp11 = load i64, i64* @global.2, align 8
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%tmp12 = add nsw i64 %tmp11, 1
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store i64 %tmp12, i64* @global.2, align 8
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%tmp13 = load i64, i64* @global.3, align 8
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%tmp14 = icmp eq i64 %tmp13, %tmp2
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br i1 %tmp14, label %bb15, label %bb19
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bb15: ; preds = %bb10
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%tmp16 = phi i64 [ %tmp13, %bb10 ]
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%tmp17 = load i64, i64* @global.4, align 8
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%tmp18 = add nsw i64 %tmp17, %tmp16
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store i64 %tmp18, i64* @global.5, align 8
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br label %bb27
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bb19: ; preds = %bb10, %bb8
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%tmp20 = load i64, i64* @global.3, align 8
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%tmp21 = load volatile i64, i64* @global, align 8
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%tmp22 = add nsw i64 %tmp21, %tmp20
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store i64 %tmp22, i64* @global.5, align 8
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store i64 3, i64* @global.1, align 8
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%tmp23 = add nsw i64 %tmp6, 1
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%tmp24 = load i64, i64* @global.6, align 8
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%tmp25 = icmp slt i64 %tmp23, %tmp24
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br i1 %tmp25, label %bb4, label %bb26
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bb26: ; preds = %bb19, %bb4
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br label %bb27
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bb27: ; preds = %bb26, %bb15
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ret void
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}
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@global = common global i64 0, align 8
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@global.1 = common global i64 0, align 8
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@global.2 = common global i64 0, align 8
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@global.3 = common global i64 0, align 8
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@global.4 = common global i64 0, align 8
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@global.5 = common global i64 0, align 8
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@global.6 = common global i64 0, align 8
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