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llvm-project/llvm/test/CodeGen/PowerPC/tls_get_addr_clobbers.ll

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Adding -verify-machineinstrs option to PowerPC tests Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. llvm-svn: 277624
2016-08-04 02:17:35 +08:00
; RUN: llc -verify-machineinstrs -mtriple="powerpc64le-unknown-linux-gnu" -relocation-model=pic < %s | FileCheck %s
Add call sequence start and end for __tls_get_addr This is a fix for bug http://llvm.org/bugs/show_bug.cgi?id=25839. For a PIC TLS variable access in a function, prologue (mflr followed by std and stdu) gets scheduled after a tls_get_addr call. tls_get_addr messed up LR but no one saves/restores it. Also added a test for save/restore clobbered registers during calling __tls_get_addr. Patch by Tim Shen llvm-svn: 257137
2016-01-08 10:06:19 +08:00
@a = thread_local global i32* null, align 8
define void @test_foo(i32* nocapture %x01, i32* nocapture %x02, i32* nocapture %x03, i32* nocapture %x04, i32* nocapture %x05, i32* nocapture %x06, i32* nocapture %x07, i32* nocapture %x08) #0 {
entry:
; CHECK-LABEL: test_foo:
; CHECK: stdu 1, {{-?[0-9]+}}(1)
; CHECK-DAG: mr [[BACKUP_3:[0-9]+]], 3
; CHECK-DAG: mr [[BACKUP_4:[0-9]+]], 4
; CHECK-DAG: mr [[BACKUP_5:[0-9]+]], 5
; CHECK-DAG: mr [[BACKUP_6:[0-9]+]], 6
; CHECK-DAG: mr [[BACKUP_7:[0-9]+]], 7
; CHECK-DAG: mr [[BACKUP_8:[0-9]+]], 8
; CHECK-DAG: mr [[BACKUP_9:[0-9]+]], 9
; CHECK-DAG: mr [[BACKUP_10:[0-9]+]], 10
; CHECK-DAG: std [[BACKUP_3]], {{[0-9]+}}(1)
; CHECK-DAG: std [[BACKUP_4]], {{[0-9]+}}(1)
; CHECK-DAG: std [[BACKUP_5]], {{[0-9]+}}(1)
; CHECK-DAG: std [[BACKUP_6]], {{[0-9]+}}(1)
; CHECK-DAG: std [[BACKUP_7]], {{[0-9]+}}(1)
; CHECK-DAG: std [[BACKUP_8]], {{[0-9]+}}(1)
; CHECK-DAG: std [[BACKUP_9]], {{[0-9]+}}(1)
; CHECK-DAG: std [[BACKUP_10]], {{[0-9]+}}(1)
; CHECK: bl __tls_get_addr
; CHECK-DAG: stw 3, 0([[BACKUP_3]])
; CHECK-DAG: stw 3, 0([[BACKUP_4]])
; CHECK-DAG: stw 3, 0([[BACKUP_5]])
; CHECK-DAG: stw 3, 0([[BACKUP_6]])
; CHECK-DAG: stw 3, 0([[BACKUP_7]])
; CHECK-DAG: stw 3, 0([[BACKUP_8]])
; CHECK-DAG: stw 3, 0([[BACKUP_9]])
; CHECK-DAG: stw 3, 0([[BACKUP_10]])
; CHECK: blr
%0 = load i32*, i32** @a, align 8
%cmp = icmp eq i32* %0, null
br i1 %cmp, label %return, label %if.end
if.end: ; preds = %entry
store i32 0, i32* %x01, align 4
store i32 0, i32* %x02, align 4
store i32 0, i32* %x03, align 4
store i32 0, i32* %x04, align 4
store i32 0, i32* %x05, align 4
store i32 0, i32* %x06, align 4
store i32 0, i32* %x07, align 4
store i32 0, i32* %x08, align 4
br label %return
return: ; preds = %entry, %if.end
ret void
}