forked from OSchip/llvm-project
60 lines
1.7 KiB
ArmAsm
60 lines
1.7 KiB
ArmAsm
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# RUN: llvm-mc -triple thumbv7 -mattr=virtualization -show-encoding %s | FileCheck %s --check-prefix=CHECK-THUMB
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hvc #1
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hvc #7
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hvc #257
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hvc #65535
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# CHECK-THUMB: [0xe0,0xf7,0x01,0x80]
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# CHECK-THUMB: [0xe0,0xf7,0x07,0x80]
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# CHECK-THUMB: [0xe0,0xf7,0x01,0x81]
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# CHECK-THUMB: [0xef,0xf7,0xff,0x8f]
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hvc.w #1
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hvc.w #7
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hvc.w #257
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hvc.w #65535
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# CHECK-THUMB: [0xe0,0xf7,0x01,0x80]
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# CHECK-THUMB: [0xe0,0xf7,0x07,0x80]
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# CHECK-THUMB: [0xe0,0xf7,0x01,0x81]
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# CHECK-THUMB: [0xef,0xf7,0xff,0x8f]
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eret
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it eq; ereteq
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it ne; eretne
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it hs; ereths
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it lo; eretlo
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it mi; eretmi
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it pl; eretpl
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it vs; eretvs
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it vc; eretvc
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it hi; erethi
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it ls; eretls
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it ge; eretge
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it lt; eretlt
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it gt; eretgt
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it le; eretle
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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# SUBS PC, LR, #0 should have the same encoding as ERET.
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# The conditional forms can't be tested becuse the ARM assembler parser doesn't
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# accept SUBS<cond> PC, LR, #<imm>, only the unconditonal form is allowed. This
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# is due to the way that the custom parser handles optional operands; see the
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# FIXME in ARM/AsmParser/ARMAsmParser.cpp.
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subs pc, lr, #0
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# CHECK-THUMB: [0xde,0xf3,0x00,0x8f]
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