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llvm-project/llvm/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll

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[Mips] Adjust float ABI settings in case of MIPS16 mode. Hard float for mips16 means essentially to compile as soft float but to use a runtime library for soft float that is written with native mips32 floating point instructions (those runtime routines run in mips32 hard float mode). The patch reviewed by Reed Kotler. llvm-svn: 195123
2013-11-19 20:20:17 +08:00
; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s
; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 < %s | FileCheck %s
Batch 4 of Mips CodeGen tests llvm-svn: 54509
2008-08-08 12:08:30 +08:00
manually upgrade a bunch of tests to modern syntax, and remove some that are either unreduced or only test old syntax. llvm-svn: 133228
2011-06-17 11:14:27 +08:00
define signext i8 @A(i8 %e.0, i8 signext %sum) nounwind {
Batch 4 of Mips CodeGen tests llvm-svn: 54509
2008-08-08 12:08:30 +08:00
entry:
64-bit sign extension in register instructions. llvm-svn: 148862
2012-01-25 05:41:09 +08:00
; CHECK: seb
Batch 4 of Mips CodeGen tests llvm-svn: 54509
2008-08-08 12:08:30 +08:00
add i8 %sum, %e.0 ; <i8>:0 [#uses=1]
ret i8 %0
}
manually upgrade a bunch of tests to modern syntax, and remove some that are either unreduced or only test old syntax. llvm-svn: 133228
2011-06-17 11:14:27 +08:00
define signext i16 @B(i16 %e.0, i16 signext %sum) nounwind {
Batch 4 of Mips CodeGen tests llvm-svn: 54509
2008-08-08 12:08:30 +08:00
entry:
64-bit sign extension in register instructions. llvm-svn: 148862
2012-01-25 05:41:09 +08:00
; CHECK: seh
Batch 4 of Mips CodeGen tests llvm-svn: 54509
2008-08-08 12:08:30 +08:00
add i16 %sum, %e.0 ; <i16>:0 [#uses=1]
ret i16 %0
}