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llvm-project/llvm/test/CodeGen/X86/2009-04-12-FastIselOverflow...

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fix a cross-block fastisel crash handling overflow intrinsics. See comment for details. This fixes rdar://6772169 llvm-svn: 68890
2009-04-12 15:51:14 +08:00
; radr://6772169
[X86] Adding reproducer for pr30981 llvm-svn: 286855
2016-11-15 02:10:44 +08:00
; RUN: llc < %s -fast-isel
; PR30981
; RUN: llc < %s -O0 -mcpu=x86-64 -mattr=+avx512f | FileCheck %s
fix a cross-block fastisel crash handling overflow intrinsics. See comment for details. This fixes rdar://6772169 llvm-svn: 68890
2009-04-12 15:51:14 +08:00
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin10"
Remove support for parsing the "type i32" syntax for defining a numbered top level type without a specified number. This syntax isn't documented and blocks forward progress. llvm-svn: 133371
2011-06-19 08:03:46 +08:00
%0 = type { i32, i1 } ; type %0
fix a cross-block fastisel crash handling overflow intrinsics. See comment for details. This fixes rdar://6772169 llvm-svn: 68890
2009-04-12 15:51:14 +08:00
declare %0 @llvm.sadd.with.overflow.i32(i32, i32) nounwind
define fastcc i32 @test() nounwind {
entry:
[X86][FastISel] Fix lowering of overflow result on AVX512 targets Summary: Fix a case where the overflow value of type i1, which is legal on AVX512, was assigned to a VK1 register class. We always want this value to be assigned to a GPR since the overflow return value is lowered to a SETO instruction. Fixes pr30981. Reviewers: mkuper, igorb, craig.topper, guyblank, qcolombet Subscribers: qcolombet, llvm-commits Differential Revision: https://reviews.llvm.org/D26620 llvm-svn: 286958
2016-11-15 21:29:23 +08:00
; CHECK-LABEL: test:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK: ## %bb.0:
[X86][FastISel] Fix lowering of overflow result on AVX512 targets Summary: Fix a case where the overflow value of type i1, which is legal on AVX512, was assigned to a VK1 register class. We always want this value to be assigned to a GPR since the overflow return value is lowered to a SETO instruction. Fixes pr30981. Reviewers: mkuper, igorb, craig.topper, guyblank, qcolombet Subscribers: qcolombet, llvm-commits Differential Revision: https://reviews.llvm.org/D26620 llvm-svn: 286958
2016-11-15 21:29:23 +08:00
; CHECK-NEXT: movl $1, %eax
; CHECK-NEXT: addl $0, %eax
; CHECK-NEXT: seto %cl
; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp) ## 4-byte Spill
; CHECK-NEXT: movb %cl, -{{[0-9]+}}(%rsp) ## 1-byte Spill
; CHECK-NEXT: jo LBB0_2
fix a cross-block fastisel crash handling overflow intrinsics. See comment for details. This fixes rdar://6772169 llvm-svn: 68890
2009-04-12 15:51:14 +08:00
%tmp1 = call %0 @llvm.sadd.with.overflow.i32(i32 1, i32 0)
%tmp2 = extractvalue %0 %tmp1, 1
br i1 %tmp2, label %.backedge, label %BB3
BB3:
%tmp4 = extractvalue %0 %tmp1, 0
br label %.backedge
.backedge:
ret i32 0
}