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llvm-project/llvm/test/CodeGen/AArch64/arm64-fast-isel-store.ll

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[FastISel][AArch64] Use the correct register class to make the MI verifier happy. This is mostly achieved by providing the correct register class manually, because getRegClassFor always returns the GPR*AllRegClass for MVT::i32 and MVT::i64. Also cleanup the code to use the FastEmitInst_* method whenever possible. This makes sure that the operands' register class is properly constrained. For all the remaining cases this adds the missing constrainOperandRegClass calls for each operand. llvm-svn: 216225
2014-08-22 04:57:57 +08:00
; RUN: llc -mtriple=aarch64-unknown-unknown -verify-machineinstrs < %s | FileCheck %s
Change the fast-isel-abort option from bool to int to enable "levels" Summary: Currently fast-isel-abort will only abort for regular instructions, and just warn for function calls, terminators, function arguments. There is already fast-isel-abort-args but nothing for calls and terminators. This change turns the fast-isel-abort options into an integer option, so that multiple levels of strictness can be defined. This will help no being surprised when the "abort" option indeed does not abort, and enables the possibility to write test that verifies that no intrinsics are forgotten by fast-isel. Reviewers: resistor, echristo Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D7941 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 230775
2015-02-28 02:32:11 +08:00
; RUN: llc -mtriple=aarch64-unknown-unknown -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
Reapply [FastISel][AArch64] Make use of the zero register when possible (r215591). Note: This was originally reverted to track down a buildbot error. Reapply without any modifications. Original commit message: This change materializes now the value "0" from the zero register. The zero register can be folded by several instruction, so no materialization is need at all. Fixes <rdar://problem/17924413>. llvm-svn: 216009
2014-08-20 03:44:02 +08:00
define void @store_i8(i8* %a) {
; CHECK-LABEL: store_i8
; CHECK: strb wzr, [x0]
store i8 0, i8* %a
ret void
}
define void @store_i16(i16* %a) {
; CHECK-LABEL: store_i16
; CHECK: strh wzr, [x0]
store i16 0, i16* %a
ret void
}
define void @store_i32(i32* %a) {
; CHECK-LABEL: store_i32
; CHECK: str wzr, [x0]
store i32 0, i32* %a
ret void
}
define void @store_i64(i64* %a) {
; CHECK-LABEL: store_i64
; CHECK: str xzr, [x0]
store i64 0, i64* %a
ret void
}