2010-08-21 00:47:17 +08:00
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/*===---- emmintrin.h - SSE2 intrinsics ------------------------------------===
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2008-12-24 09:45:22 +08:00
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*
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2019-04-09 04:51:30 +08:00
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2008-12-24 09:45:22 +08:00
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*
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*===-----------------------------------------------------------------------===
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*/
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2010-08-21 00:47:17 +08:00
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2008-12-24 09:45:22 +08:00
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#ifndef __EMMINTRIN_H
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#define __EMMINTRIN_H
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2021-09-13 21:27:24 +08:00
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#if !defined(__i386__) && !defined(__x86_64__)
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#error "This header is only meant to be used on x86 and x64 architecture"
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#endif
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2008-12-24 09:45:22 +08:00
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#include <xmmintrin.h>
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2019-02-09 03:45:08 +08:00
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typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16)));
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typedef long long __m128i __attribute__((__vector_size__(16), __aligned__(16)));
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typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1)));
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2022-04-22 09:18:41 +08:00
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typedef long long __m128i_u
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__attribute__((__vector_size__(16), __aligned__(1)));
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2008-12-24 09:45:22 +08:00
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2010-08-26 10:09:25 +08:00
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/* Type defines. */
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2022-04-22 09:18:41 +08:00
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typedef double __v2df __attribute__((__vector_size__(16)));
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typedef long long __v2di __attribute__((__vector_size__(16)));
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2008-12-24 10:41:00 +08:00
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typedef short __v8hi __attribute__((__vector_size__(16)));
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2009-09-19 03:18:19 +08:00
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typedef char __v16qi __attribute__((__vector_size__(16)));
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2008-12-24 09:45:22 +08:00
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2016-05-30 02:49:08 +08:00
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/* Unsigned types */
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2022-04-22 09:18:41 +08:00
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typedef unsigned long long __v2du __attribute__((__vector_size__(16)));
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2016-05-30 02:49:08 +08:00
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typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
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typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
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Fix the SSE4 byte sign extension in a cleaner way, and more thoroughly
test that our intrinsics behave the same under -fsigned-char and
-funsigned-char.
This further testing uncovered that AVX-2 has a broken cmpgt for 8-bit
elements, and has for a long time. This is fixed in the same way as
SSE4 handles the case.
The other ISA extensions currently work correctly because they use
specific instruction intrinsics. As soon as they are rewritten in terms
of generic IR, they will need to add these special casts. I've added the
necessary testing to catch this however, so we shouldn't have to chase
it down again.
I considered changing the core typedef to be signed, but that seems like
a bad idea. Notably, it would be an ABI break if anyone is reaching into
the innards of the intrinsic headers and passing __v16qi on an API
boundary. I can't be completely confident that this wouldn't happen due
to a macro expanding in a lambda, etc., so it seems much better to leave
it alone. It also matches GCC's behavior exactly.
A fun side note is that for both GCC and Clang, -funsigned-char really
does change the semantics of __v16qi. To observe this, consider:
% cat x.cc
#include <smmintrin.h>
#include <iostream>
int main() {
__v16qi a = { 1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
__v16qi b = _mm_set1_epi8(-1);
std::cout << (int)(a / b)[0] << ", " << (int)(a / b)[1] << '\n';
}
% clang++ -o x x.cc && ./x
-1, 1
% clang++ -funsigned-char -o x x.cc && ./x
0, 1
However, while this may be surprising, both Clang and GCC agree.
Differential Revision: http://reviews.llvm.org/D13324
llvm-svn: 249097
2015-10-02 07:40:12 +08:00
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/* We need an explicitly signed variant for char. Note that this shouldn't
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* appear in the interface though. */
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typedef signed char __v16qs __attribute__((__vector_size__(16)));
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2015-06-17 15:09:20 +08:00
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/* Define the default attributes for the functions in this file. */
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2022-04-22 09:18:41 +08:00
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#define __DEFAULT_FN_ATTRS \
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__attribute__((__always_inline__, __nodebug__, __target__("sse2"), \
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__min_vector_width__(128)))
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#define __DEFAULT_FN_ATTRS_MMX \
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__attribute__((__always_inline__, __nodebug__, __target__("mmx,sse2"), \
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__min_vector_width__(64)))
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2015-06-17 15:09:20 +08:00
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2018-05-09 09:00:01 +08:00
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/// Adds lower double-precision values in both operands and returns the
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2016-10-21 01:59:15 +08:00
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/// sum in the lower 64 bits of the result. The upper 64 bits of the result
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/// are copied from the upper double-precision value of the first operand.
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///
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/// \headerfile <x86intrin.h>
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///
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2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VADDSD / ADDSD </c> instruction.
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2016-10-21 01:59:15 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing one of the source operands.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing one of the source operands.
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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/// sum of the lower 64 bits of both operands. The upper 64 bits are copied
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/// from the upper 64 bits of the first source operand.
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2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_add_sd(__m128d __a,
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__m128d __b) {
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2013-01-17 07:08:36 +08:00
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__a[0] += __b[0];
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return __a;
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2008-12-24 09:45:22 +08:00
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}
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2018-05-09 09:00:01 +08:00
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/// Adds two 128-bit vectors of [2 x double].
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2016-10-21 01:59:15 +08:00
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///
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/// \headerfile <x86intrin.h>
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///
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2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VADDPD / ADDPD </c> instruction.
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2016-10-21 01:59:15 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing one of the source operands.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing one of the source operands.
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/// \returns A 128-bit vector of [2 x double] containing the sums of both
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/// operands.
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2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_add_pd(__m128d __a,
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__m128d __b) {
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2016-05-16 14:38:42 +08:00
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return (__m128d)((__v2df)__a + (__v2df)__b);
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2008-12-24 09:45:22 +08:00
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}
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2018-05-09 09:00:01 +08:00
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/// Subtracts the lower double-precision value of the second operand
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2016-10-21 01:59:15 +08:00
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/// from the lower double-precision value of the first operand and returns
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/// the difference in the lower 64 bits of the result. The upper 64 bits of
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/// the result are copied from the upper double-precision value of the first
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/// operand.
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///
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/// \headerfile <x86intrin.h>
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///
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2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VSUBSD / SUBSD </c> instruction.
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2016-10-21 01:59:15 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing the minuend.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing the subtrahend.
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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/// difference of the lower 64 bits of both operands. The upper 64 bits are
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/// copied from the upper 64 bits of the first source operand.
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2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sub_sd(__m128d __a,
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__m128d __b) {
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2013-01-17 07:08:36 +08:00
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__a[0] -= __b[0];
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return __a;
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2008-12-24 09:45:22 +08:00
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}
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2018-05-09 09:00:01 +08:00
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/// Subtracts two 128-bit vectors of [2 x double].
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2016-10-21 01:59:15 +08:00
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///
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/// \headerfile <x86intrin.h>
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///
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2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VSUBPD / SUBPD </c> instruction.
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2016-10-21 01:59:15 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing the minuend.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing the subtrahend.
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/// \returns A 128-bit vector of [2 x double] containing the differences between
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/// both operands.
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2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sub_pd(__m128d __a,
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__m128d __b) {
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2016-05-16 14:38:42 +08:00
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return (__m128d)((__v2df)__a - (__v2df)__b);
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2008-12-24 09:45:22 +08:00
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}
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2018-05-09 09:00:01 +08:00
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/// Multiplies lower double-precision values in both operands and returns
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2016-10-21 01:59:15 +08:00
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/// the product in the lower 64 bits of the result. The upper 64 bits of the
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/// result are copied from the upper double-precision value of the first
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/// operand.
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///
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/// \headerfile <x86intrin.h>
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///
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2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VMULSD / MULSD </c> instruction.
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2016-10-21 01:59:15 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing one of the source operands.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing one of the source operands.
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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/// product of the lower 64 bits of both operands. The upper 64 bits are
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/// copied from the upper 64 bits of the first source operand.
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2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mul_sd(__m128d __a,
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__m128d __b) {
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2013-01-17 07:08:36 +08:00
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__a[0] *= __b[0];
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return __a;
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2008-12-24 09:45:22 +08:00
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}
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2018-05-09 09:00:01 +08:00
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/// Multiplies two 128-bit vectors of [2 x double].
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2016-10-21 01:59:15 +08:00
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///
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/// \headerfile <x86intrin.h>
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///
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2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VMULPD / MULPD </c> instruction.
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2016-10-21 01:59:15 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing one of the operands.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing one of the operands.
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/// \returns A 128-bit vector of [2 x double] containing the products of both
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/// operands.
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2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mul_pd(__m128d __a,
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__m128d __b) {
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2016-05-16 14:38:42 +08:00
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return (__m128d)((__v2df)__a * (__v2df)__b);
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2008-12-24 09:45:22 +08:00
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}
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2018-05-09 09:00:01 +08:00
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/// Divides the lower double-precision value of the first operand by the
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2016-10-21 01:59:15 +08:00
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/// lower double-precision value of the second operand and returns the
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/// quotient in the lower 64 bits of the result. The upper 64 bits of the
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/// result are copied from the upper double-precision value of the first
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/// operand.
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///
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/// \headerfile <x86intrin.h>
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///
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2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VDIVSD / DIVSD </c> instruction.
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2016-10-21 01:59:15 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing the dividend.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing divisor.
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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/// quotient of the lower 64 bits of both operands. The upper 64 bits are
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/// copied from the upper 64 bits of the first source operand.
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2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_div_sd(__m128d __a,
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__m128d __b) {
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2013-01-17 07:08:36 +08:00
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__a[0] /= __b[0];
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return __a;
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2008-12-24 09:45:22 +08:00
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}
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2018-05-09 09:00:01 +08:00
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/// Performs an element-by-element division of two 128-bit vectors of
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2016-10-21 01:59:15 +08:00
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/// [2 x double].
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///
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/// \headerfile <x86intrin.h>
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///
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2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VDIVPD / DIVPD </c> instruction.
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2016-10-21 01:59:15 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing the dividend.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing the divisor.
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/// \returns A 128-bit vector of [2 x double] containing the quotients of both
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/// operands.
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2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_div_pd(__m128d __a,
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__m128d __b) {
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2016-05-16 14:38:42 +08:00
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return (__m128d)((__v2df)__a / (__v2df)__b);
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2008-12-24 09:45:22 +08:00
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}
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2018-05-09 09:00:01 +08:00
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/// Calculates the square root of the lower double-precision value of
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2016-10-21 01:59:15 +08:00
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/// the second operand and returns it in the lower 64 bits of the result.
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2018-01-03 04:39:29 +08:00
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/// The upper 64 bits of the result are copied from the upper
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/// double-precision value of the first operand.
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2016-10-21 01:59:15 +08:00
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///
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/// \headerfile <x86intrin.h>
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///
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2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VSQRTSD / SQRTSD </c> instruction.
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2016-10-21 01:59:15 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing one of the operands. The
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/// upper 64 bits of this operand are copied to the upper 64 bits of the
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/// result.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing one of the operands. The
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/// square root is calculated using the lower 64 bits of this operand.
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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2016-12-09 06:10:51 +08:00
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/// square root of the lower 64 bits of operand \a __b, and whose upper 64
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/// bits are copied from the upper 64 bits of operand \a __a.
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2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a,
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__m128d __b) {
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2016-05-16 14:38:42 +08:00
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__m128d __c = __builtin_ia32_sqrtsd((__v2df)__b);
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2022-04-22 09:18:41 +08:00
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return __extension__(__m128d){__c[0], __a[1]};
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2008-12-24 09:45:22 +08:00
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}
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2018-05-09 09:00:01 +08:00
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/// Calculates the square root of the each of two values stored in a
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2016-10-21 01:59:15 +08:00
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/// 128-bit vector of [2 x double].
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///
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/// \headerfile <x86intrin.h>
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///
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2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VSQRTPD / SQRTPD </c> instruction.
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2016-10-21 01:59:15 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double].
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/// \returns A 128-bit vector of [2 x double] containing the square roots of the
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/// values in the operand.
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2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a) {
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2016-05-16 14:38:42 +08:00
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return __builtin_ia32_sqrtpd((__v2df)__a);
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2008-12-24 09:45:22 +08:00
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}
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|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares lower 64-bit double-precision values of both operands, and
|
2016-10-21 01:59:15 +08:00
|
|
|
/// returns the lesser of the pair of values in the lower 64-bits of the
|
2018-01-03 04:39:29 +08:00
|
|
|
/// result. The upper 64 bits of the result are copied from the upper
|
|
|
|
/// double-precision value of the first operand.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMINSD / MINSD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the operands. The
|
|
|
|
/// lower 64 bits of this operand are used in the comparison.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the operands. The
|
|
|
|
/// lower 64 bits of this operand are used in the comparison.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
|
|
|
/// minimum value between both operands. The upper 64 bits are copied from
|
|
|
|
/// the upper 64 bits of the first source operand.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Performs element-by-element comparison of the two 128-bit vectors of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// [2 x double] and returns the vector containing the lesser of each pair of
|
|
|
|
/// values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMINPD / MINPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the operands.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the minimum values
|
|
|
|
/// between both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares lower 64-bit double-precision values of both operands, and
|
2016-10-21 01:59:15 +08:00
|
|
|
/// returns the greater of the pair of values in the lower 64-bits of the
|
2018-01-03 04:39:29 +08:00
|
|
|
/// result. The upper 64 bits of the result are copied from the upper
|
|
|
|
/// double-precision value of the first operand.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMAXSD / MAXSD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the operands. The
|
|
|
|
/// lower 64 bits of this operand are used in the comparison.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the operands. The
|
|
|
|
/// lower 64 bits of this operand are used in the comparison.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
|
|
|
/// maximum value between both operands. The upper 64 bits are copied from
|
|
|
|
/// the upper 64 bits of the first source operand.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Performs element-by-element comparison of the two 128-bit vectors of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// [2 x double] and returns the vector containing the greater of each pair
|
|
|
|
/// of values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMAXPD / MAXPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the operands.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the maximum values
|
|
|
|
/// between both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Performs a bitwise AND of two 128-bit vectors of [2 x double].
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
|
|
|
|
/// values between both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_and_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-08-31 13:38:55 +08:00
|
|
|
return (__m128d)((__v2du)__a & (__v2du)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Performs a bitwise AND of two 128-bit vectors of [2 x double], using
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the one's complement of the values contained in the first source operand.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing the left source operand. The
|
|
|
|
/// one's complement of this value is used in the bitwise AND.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double] containing the right source operand.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
|
|
|
|
/// values in the second operand and the one's complement of the first
|
|
|
|
/// operand.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_andnot_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-08-31 13:38:55 +08:00
|
|
|
return (__m128d)(~(__v2du)__a & (__v2du)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Performs a bitwise OR of two 128-bit vectors of [2 x double].
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise OR of the
|
|
|
|
/// values between both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_or_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-08-31 13:38:55 +08:00
|
|
|
return (__m128d)((__v2du)__a | (__v2du)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Performs a bitwise XOR of two 128-bit vectors of [2 x double].
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise XOR of the
|
|
|
|
/// values between both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_xor_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-08-31 13:38:55 +08:00
|
|
|
return (__m128d)((__v2du)__a ^ (__v2du)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2018-02-16 11:11:35 +08:00
|
|
|
/// 128-bit vectors of [2 x double] for equality. Each comparison yields 0x0
|
|
|
|
/// for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPEQPD / CMPEQPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpeqpd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
|
|
|
/// operand are less than those in the second operand. Each comparison
|
2018-02-16 11:11:35 +08:00
|
|
|
/// yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpltpd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
2017-05-15 11:25:04 +08:00
|
|
|
/// operand are less than or equal to those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmplepd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
2017-05-15 11:25:04 +08:00
|
|
|
/// operand are greater than those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpltpd((__v2df)__b, (__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
2017-05-15 11:25:04 +08:00
|
|
|
/// operand are greater than or equal to those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmplepd((__v2df)__b, (__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
2017-05-15 11:25:04 +08:00
|
|
|
/// operand are ordered with respect to those in the second operand.
|
|
|
|
///
|
|
|
|
/// A pair of double-precision values are "ordered" with respect to each
|
2018-02-16 11:11:35 +08:00
|
|
|
/// other if neither value is a NaN. Each comparison yields 0x0 for false,
|
|
|
|
/// 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPORDPD / CMPORDPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpordpd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
2017-05-15 11:25:04 +08:00
|
|
|
/// operand are unordered with respect to those in the second operand.
|
|
|
|
///
|
|
|
|
/// A pair of double-precision values are "unordered" with respect to each
|
2018-02-16 11:11:35 +08:00
|
|
|
/// other if one or both values are NaN. Each comparison yields 0x0 for
|
|
|
|
/// false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPUNORDPD / CMPUNORDPD </c>
|
|
|
|
/// instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpunordpd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
2017-05-15 11:25:04 +08:00
|
|
|
/// operand are unequal to those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPNEQPD / CMPNEQPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpneqpd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
2017-05-15 11:25:04 +08:00
|
|
|
/// operand are not less than those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
2017-05-15 11:25:04 +08:00
|
|
|
/// operand are not less than or equal to those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
2017-05-15 11:25:04 +08:00
|
|
|
/// operand are not greater than those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__b, (__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding double-precision values of the
|
2016-10-21 01:59:15 +08:00
|
|
|
/// 128-bit vectors of [2 x double] to determine if the values in the first
|
|
|
|
/// operand are not greater than or equal to those in the second operand.
|
2017-05-15 11:25:04 +08:00
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_pd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__b, (__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2017-05-15 11:25:04 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] for equality.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPEQSD / CMPEQSD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpeqsd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is less than the corresponding value in
|
2017-05-15 11:25:04 +08:00
|
|
|
/// the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpltsd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is less than or equal to the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding value in the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmplesd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-12-27 08:49:38 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is greater than the corresponding value
|
2017-05-15 11:25:04 +08:00
|
|
|
/// in the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
__m128d __c = __builtin_ia32_cmpltsd((__v2df)__b, (__v2df)__a);
|
2022-04-22 09:18:41 +08:00
|
|
|
return __extension__(__m128d){__c[0], __a[1]};
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is greater than or equal to the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding value in the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
__m128d __c = __builtin_ia32_cmplesd((__v2df)__b, (__v2df)__a);
|
2022-04-22 09:18:41 +08:00
|
|
|
return __extension__(__m128d){__c[0], __a[1]};
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-12-27 08:49:38 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is "ordered" with respect to the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding value in the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. A pair
|
|
|
|
/// of double-precision values are "ordered" with respect to each other if
|
2017-05-15 11:25:04 +08:00
|
|
|
/// neither value is a NaN.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPORDSD / CMPORDSD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpordsd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-12-27 08:49:38 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is "unordered" with respect to the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding value in the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. A pair
|
|
|
|
/// of double-precision values are "unordered" with respect to each other if
|
|
|
|
/// one or both values are NaN.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPUNORDSD / CMPUNORDSD </c>
|
|
|
|
/// instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpunordsd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is unequal to the corresponding value in
|
2017-05-15 11:25:04 +08:00
|
|
|
/// the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPNEQSD / CMPNEQSD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpneqsd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is not less than the corresponding
|
2017-05-15 11:25:04 +08:00
|
|
|
/// value in the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpnltsd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is not less than or equal to the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding value in the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128d)__builtin_ia32_cmpnlesd((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is not greater than the corresponding
|
2017-05-15 11:25:04 +08:00
|
|
|
/// value in the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
__m128d __c = __builtin_ia32_cmpnltsd((__v2df)__b, (__v2df)__a);
|
2022-04-22 09:18:41 +08:00
|
|
|
return __extension__(__m128d){__c[0], __a[1]};
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is not greater than or equal to the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding value in the second parameter.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
2016-12-09 06:10:51 +08:00
|
|
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
__m128d __c = __builtin_ia32_cmpnlesd((__v2df)__b, (__v2df)__a);
|
2022-04-22 09:18:41 +08:00
|
|
|
return __extension__(__m128d){__c[0], __a[1]};
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2018-01-03 04:39:29 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] for equality.
|
|
|
|
///
|
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2018-01-03 04:39:29 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_comieq_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_comisdeq((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is less than the corresponding value in
|
2017-05-15 11:25:04 +08:00
|
|
|
/// the second parameter.
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2018-01-03 04:39:29 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_comilt_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_comisdlt((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is less than or equal to the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding value in the second parameter.
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2018-01-03 04:39:29 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_comile_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_comisdle((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is greater than the corresponding value
|
2017-05-15 11:25:04 +08:00
|
|
|
/// in the second parameter.
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2018-01-03 04:39:29 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_comigt_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_comisdgt((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is greater than or equal to the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding value in the second parameter.
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2018-01-03 04:39:29 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_comige_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_comisdge((__v2df)__a, (__v2df)__b);
|
2011-10-07 04:31:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is unequal to the corresponding value in
|
2017-05-15 11:25:04 +08:00
|
|
|
/// the second parameter.
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 1 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2018-01-03 04:39:29 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 1 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_comineq_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_comisdneq((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] for equality. The
|
2017-05-15 11:25:04 +08:00
|
|
|
/// comparison yields 0 for false, 1 for true.
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// If either of the two lower double-precision values is NaN, 0 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
2018-01-03 04:39:29 +08:00
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomieq_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_ucomisdeq((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is less than the corresponding value in
|
2017-05-15 11:25:04 +08:00
|
|
|
/// the second parameter.
|
|
|
|
///
|
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two lower
|
2018-01-03 04:39:29 +08:00
|
|
|
/// double-precision values is NaN, 0 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
2018-01-03 04:39:29 +08:00
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomilt_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_ucomisdlt((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is less than or equal to the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding value in the second parameter.
|
|
|
|
///
|
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two lower
|
2018-01-03 04:39:29 +08:00
|
|
|
/// double-precision values is NaN, 0 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
2018-01-03 04:39:29 +08:00
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomile_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_ucomisdle((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is greater than the corresponding value
|
2017-05-15 11:25:04 +08:00
|
|
|
/// in the second parameter.
|
|
|
|
///
|
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two lower
|
|
|
|
/// double-precision values is NaN, 0 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomigt_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_ucomisdgt((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-21 01:59:15 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is greater than or equal to the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding value in the second parameter.
|
|
|
|
///
|
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
|
2016-10-21 01:59:15 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-21 01:59:15 +08:00
|
|
|
/// \returns An integer containing the comparison results. If either of the two
|
|
|
|
/// lower double-precision values is NaN, 0 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomige_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_ucomisdge((__v2df)__a, (__v2df)__b);
|
2011-08-30 05:26:24 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares the lower double-precision floating-point values in each of
|
2016-10-23 15:30:50 +08:00
|
|
|
/// the two 128-bit floating-point vectors of [2 x double] to determine if
|
|
|
|
/// the value in the first parameter is unequal to the corresponding value in
|
2017-05-15 11:25:04 +08:00
|
|
|
/// the second parameter.
|
|
|
|
///
|
|
|
|
/// The comparison yields 0 for false, 1 for true. If either of the two lower
|
2018-01-03 04:39:29 +08:00
|
|
|
/// double-precision values is NaN, 1 is returned.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __b.
|
2016-10-23 15:30:50 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision value is
|
2016-12-09 06:10:51 +08:00
|
|
|
/// compared to the lower double-precision value of \a __a.
|
2016-10-23 15:30:50 +08:00
|
|
|
/// \returns An integer containing the comparison result. If either of the two
|
2018-01-03 04:39:29 +08:00
|
|
|
/// lower double-precision values is NaN, 1 is returned.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomineq_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_ucomisdneq((__v2df)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the two double-precision floating-point elements of a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 128-bit vector of [2 x double] into two single-precision floating-point
|
|
|
|
/// values, returned in the lower 64 bits of a 128-bit vector of [4 x float].
|
|
|
|
/// The upper 64 bits of the result vector are set to zero.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTPD2PS / CVTPD2PS </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
|
|
|
|
/// converted values. The upper 64 bits are set to zero.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtpd_ps(__m128d __a) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_cvtpd2ps((__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the lower two single-precision floating-point elements of a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 128-bit vector of [4 x float] into two double-precision floating-point
|
|
|
|
/// values, returned in a 128-bit vector of [2 x double]. The upper two
|
|
|
|
/// elements of the input vector are unused.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTPS2PD / CVTPS2PD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [4 x float]. The lower two single-precision
|
|
|
|
/// floating-point elements are converted to double-precision values. The
|
|
|
|
/// upper two elements are unused.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtps_pd(__m128 __a) {
|
2016-05-24 06:13:02 +08:00
|
|
|
return (__m128d) __builtin_convertvector(
|
|
|
|
__builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 1), __v2df);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the lower two integer elements of a 128-bit vector of
|
2016-10-23 15:30:50 +08:00
|
|
|
/// [4 x i32] into two double-precision floating-point values, returned in a
|
2017-05-15 11:25:04 +08:00
|
|
|
/// 128-bit vector of [2 x double].
|
|
|
|
///
|
|
|
|
/// The upper two elements of the input vector are unused.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTDQ2PD / CVTDQ2PD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector of [4 x i32]. The lower two integer elements are
|
2017-05-15 11:25:04 +08:00
|
|
|
/// converted to double-precision values.
|
|
|
|
///
|
|
|
|
/// The upper two elements are unused.
|
2016-10-23 15:30:50 +08:00
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtepi32_pd(__m128i __a) {
|
2016-05-24 06:13:02 +08:00
|
|
|
return (__m128d) __builtin_convertvector(
|
|
|
|
__builtin_shufflevector((__v4si)__a, (__v4si)__a, 0, 1), __v2df);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the two double-precision floating-point elements of a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 128-bit vector of [2 x double] into two signed 32-bit integer values,
|
|
|
|
/// returned in the lower 64 bits of a 128-bit vector of [4 x i32]. The upper
|
|
|
|
/// 64 bits of the result vector are set to zero.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTPD2DQ / CVTPD2DQ </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
|
|
|
|
/// converted values. The upper 64 bits are set to zero.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtpd_epi32(__m128d __a) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_cvtpd2dq((__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the low-order element of a 128-bit vector of [2 x double]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// into a 32-bit signed integer value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
|
|
/// conversion.
|
|
|
|
/// \returns A 32-bit signed integer containing the converted value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsd_si32(__m128d __a) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_cvtsd2si((__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the lower double-precision floating-point element of a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 128-bit vector of [2 x double], in the second parameter, into a
|
|
|
|
/// single-precision floating-point value, returned in the lower 32 bits of a
|
|
|
|
/// 128-bit vector of [4 x float]. The upper 96 bits of the result vector are
|
|
|
|
/// copied from the upper 96 bits of the first parameter.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTSD2SS / CVTSD2SS </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [4 x float]. The upper 96 bits of this parameter are
|
|
|
|
/// copied to the upper 96 bits of the result.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower double-precision
|
|
|
|
/// floating-point element is used in the conversion.
|
|
|
|
/// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the
|
|
|
|
/// converted value from the second parameter. The upper 96 bits are copied
|
|
|
|
/// from the upper 96 bits of the first parameter.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtsd_ss(__m128 __a,
|
|
|
|
__m128d __b) {
|
2016-07-20 18:18:01 +08:00
|
|
|
return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts a 32-bit signed integer value, in the second parameter, into
|
2016-10-23 15:30:50 +08:00
|
|
|
/// a double-precision floating-point value, returned in the lower 64 bits of
|
|
|
|
/// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector
|
|
|
|
/// are copied from the upper 64 bits of the first parameter.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
|
|
|
|
/// copied to the upper 64 bits of the result.
|
|
|
|
/// \param __b
|
|
|
|
/// A 32-bit signed integer containing the value to be converted.
|
|
|
|
/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
|
|
|
|
/// converted value from the second parameter. The upper 64 bits are copied
|
|
|
|
/// from the upper 64 bits of the first parameter.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtsi32_sd(__m128d __a,
|
|
|
|
int __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
__a[0] = __b;
|
|
|
|
return __a;
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the lower single-precision floating-point element of a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 128-bit vector of [4 x float], in the second parameter, into a
|
|
|
|
/// double-precision floating-point value, returned in the lower 64 bits of
|
|
|
|
/// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector
|
|
|
|
/// are copied from the upper 64 bits of the first parameter.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTSS2SD / CVTSS2SD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
|
|
|
|
/// copied to the upper 64 bits of the result.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [4 x float]. The lower single-precision
|
|
|
|
/// floating-point element is used in the conversion.
|
|
|
|
/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
|
|
|
|
/// converted value from the second parameter. The upper 64 bits are copied
|
|
|
|
/// from the upper 64 bits of the first parameter.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtss_sd(__m128d __a,
|
|
|
|
__m128 __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
__a[0] = __b[0];
|
|
|
|
return __a;
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the two double-precision floating-point elements of a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 128-bit vector of [2 x double] into two signed 32-bit integer values,
|
2017-05-15 11:25:04 +08:00
|
|
|
/// returned in the lower 64 bits of a 128-bit vector of [4 x i32].
|
|
|
|
///
|
|
|
|
/// If the result of either conversion is inexact, the result is truncated
|
|
|
|
/// (rounded towards zero) regardless of the current MXCSR setting. The upper
|
|
|
|
/// 64 bits of the result vector are set to zero.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTTPD2DQ / CVTTPD2DQ </c>
|
|
|
|
/// instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
|
|
|
|
/// converted values. The upper 64 bits are set to zero.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttpd_epi32(__m128d __a) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the low-order element of a [2 x double] vector into a 32-bit
|
2016-10-23 15:30:50 +08:00
|
|
|
/// signed integer value, truncating the result when it is inexact.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>
|
|
|
|
/// instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
|
|
/// conversion.
|
|
|
|
/// \returns A 32-bit signed integer containing the converted value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvttsd_si32(__m128d __a) {
|
2016-07-20 18:18:01 +08:00
|
|
|
return __builtin_ia32_cvttsd2si((__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the two double-precision floating-point elements of a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 128-bit vector of [2 x double] into two signed 32-bit integer values,
|
|
|
|
/// returned in a 64-bit vector of [2 x i32].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> CVTPD2PI </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 64-bit vector of [2 x i32] containing the converted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_cvtpd_pi32(__m128d __a) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m64)__builtin_ia32_cvtpd2pi((__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the two double-precision floating-point elements of a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 128-bit vector of [2 x double] into two signed 32-bit integer values,
|
2017-05-15 11:25:04 +08:00
|
|
|
/// returned in a 64-bit vector of [2 x i32].
|
|
|
|
///
|
|
|
|
/// If the result of either conversion is inexact, the result is truncated
|
|
|
|
/// (rounded towards zero) regardless of the current MXCSR setting.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> CVTTPD2PI </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double].
|
|
|
|
/// \returns A 64-bit vector of [2 x i32] containing the converted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_cvttpd_pi32(__m128d __a) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m64)__builtin_ia32_cvttpd2pi((__v2df)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the two signed 32-bit integer elements of a 64-bit vector of
|
2016-10-23 15:30:50 +08:00
|
|
|
/// [2 x i32] into two double-precision floating-point values, returned in a
|
|
|
|
/// 128-bit vector of [2 x double].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> CVTPI2PD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 64-bit vector of [2 x i32].
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS_MMX _mm_cvtpi32_pd(__m64 __a) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return __builtin_ia32_cvtpi2pd((__v2si)__a);
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Returns the low-order element of a 128-bit vector of [2 x double] as
|
2016-10-23 15:30:50 +08:00
|
|
|
/// a double-precision floating-point value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic has no corresponding instruction.
|
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are returned.
|
|
|
|
/// \returns A double-precision floating-point value copied from the lower 64
|
2016-12-09 06:10:51 +08:00
|
|
|
/// bits of \a __a.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ double __DEFAULT_FN_ATTRS _mm_cvtsd_f64(__m128d __a) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return __a[0];
|
2008-12-24 09:45:22 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Loads a 128-bit floating-point vector of [2 x double] from an aligned
|
2016-10-23 15:30:50 +08:00
|
|
|
/// memory location.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a 128-bit memory location. The address of the memory
|
|
|
|
/// location has to be 16-byte aligned.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the loaded values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_pd(double const *__dp) {
|
|
|
|
return *(const __m128d *)__dp;
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Loads a double-precision floating-point value from a specified memory
|
2016-10-23 15:30:50 +08:00
|
|
|
/// location and duplicates it to both vector elements of a 128-bit vector of
|
|
|
|
/// [2 x double].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVDDUP / MOVDDUP </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a memory location containing a double-precision value.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the loaded and
|
|
|
|
/// duplicated values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load1_pd(double const *__dp) {
|
2011-09-16 07:15:27 +08:00
|
|
|
struct __mm_load1_pd_struct {
|
2013-01-17 07:08:36 +08:00
|
|
|
double __u;
|
2011-09-16 07:15:27 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
double __u = ((const struct __mm_load1_pd_struct *)__dp)->__u;
|
|
|
|
return __extension__(__m128d){__u, __u};
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_load_pd1(dp) _mm_load1_pd(dp)
|
2009-06-02 13:55:48 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Loads two double-precision values, in reverse order, from an aligned
|
2016-10-23 15:30:50 +08:00
|
|
|
/// memory location into a 128-bit vector of [2 x double].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction +
|
|
|
|
/// needed shuffling instructions. In AVX mode, the shuffling may be combined
|
|
|
|
/// with the \c VMOVAPD, resulting in only a \c VPERMILPD instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A 16-byte aligned pointer to an array of double-precision values to be
|
|
|
|
/// loaded in reverse order.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the reversed loaded
|
|
|
|
/// values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadr_pd(double const *__dp) {
|
|
|
|
__m128d __u = *(const __m128d *)__dp;
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_shufflevector((__v2df)__u, (__v2df)__u, 1, 0);
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Loads a 128-bit floating-point vector of [2 x double] from an
|
2016-10-23 15:30:50 +08:00
|
|
|
/// unaligned memory location.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a 128-bit memory location. The address of the memory
|
|
|
|
/// location does not have to be aligned.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the loaded values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadu_pd(double const *__dp) {
|
2011-05-13 08:11:39 +08:00
|
|
|
struct __loadu_pd {
|
2019-02-09 03:45:08 +08:00
|
|
|
__m128d_u __v;
|
2015-02-04 08:26:10 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
return ((const struct __loadu_pd *)__dp)->__v;
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Loads a 64-bit integer value to the low element of a 128-bit integer
|
2017-01-13 09:14:08 +08:00
|
|
|
/// vector and clears the upper element.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
|
|
|
|
///
|
2017-06-07 06:58:01 +08:00
|
|
|
/// \param __a
|
2017-01-13 09:14:08 +08:00
|
|
|
/// A pointer to a 64-bit memory location. The address of the memory
|
|
|
|
/// location does not have to be aligned.
|
|
|
|
/// \returns A 128-bit vector of [2 x i64] containing the loaded value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si64(void const *__a) {
|
2016-06-26 21:51:54 +08:00
|
|
|
struct __loadu_si64 {
|
|
|
|
long long __v;
|
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
long long __u = ((const struct __loadu_si64 *)__a)->__v;
|
|
|
|
return __extension__(__m128i)(__v2di){__u, 0LL};
|
2018-09-30 01:49:42 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/// Loads a 32-bit integer value to the low element of a 128-bit integer
|
|
|
|
/// vector and clears the upper element.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
|
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A pointer to a 32-bit memory location. The address of the memory
|
|
|
|
/// location does not have to be aligned.
|
|
|
|
/// \returns A 128-bit vector of [4 x i32] containing the loaded value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si32(void const *__a) {
|
2018-09-30 01:49:42 +08:00
|
|
|
struct __loadu_si32 {
|
|
|
|
int __v;
|
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
int __u = ((const struct __loadu_si32 *)__a)->__v;
|
|
|
|
return __extension__(__m128i)(__v4si){__u, 0, 0, 0};
|
2018-09-30 01:49:42 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/// Loads a 16-bit integer value to the low element of a 128-bit integer
|
|
|
|
/// vector and clears the upper element.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic does not correspond to a specific instruction.
|
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A pointer to a 16-bit memory location. The address of the memory
|
|
|
|
/// location does not have to be aligned.
|
|
|
|
/// \returns A 128-bit vector of [8 x i16] containing the loaded value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si16(void const *__a) {
|
2018-09-30 01:49:42 +08:00
|
|
|
struct __loadu_si16 {
|
|
|
|
short __v;
|
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
short __u = ((const struct __loadu_si16 *)__a)->__v;
|
|
|
|
return __extension__(__m128i)(__v8hi){__u, 0, 0, 0, 0, 0, 0, 0};
|
2016-06-26 21:51:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Loads a 64-bit double-precision value to the low element of a
|
2017-01-13 09:14:08 +08:00
|
|
|
/// 128-bit integer vector and clears the upper element.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
|
|
|
|
///
|
|
|
|
/// \param __dp
|
2017-06-07 06:58:01 +08:00
|
|
|
/// A pointer to a memory location containing a double-precision value.
|
2017-01-13 09:14:08 +08:00
|
|
|
/// The address of the memory location does not have to be aligned.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the loaded value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_sd(double const *__dp) {
|
2011-09-16 07:15:27 +08:00
|
|
|
struct __mm_load_sd_struct {
|
2013-01-17 07:08:36 +08:00
|
|
|
double __u;
|
2011-09-16 07:15:27 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
double __u = ((const struct __mm_load_sd_struct *)__dp)->__u;
|
|
|
|
return __extension__(__m128d){__u, 0};
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Loads a double-precision value into the high-order bits of a 128-bit
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vector of [2 x double]. The low-order bits are copied from the low-order
|
|
|
|
/// bits of the first operand.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [2 x double]. \n
|
2016-10-23 15:30:50 +08:00
|
|
|
/// Bits [63:0] are written to bits [63:0] of the result.
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a 64-bit memory location containing a double-precision
|
|
|
|
/// floating-point value that is loaded. The loaded value is written to bits
|
|
|
|
/// [127:64] of the result. The address of the memory location does not have
|
|
|
|
/// to be aligned.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadh_pd(__m128d __a,
|
|
|
|
double const *__dp) {
|
2011-09-16 07:15:27 +08:00
|
|
|
struct __mm_loadh_pd_struct {
|
2013-01-17 07:08:36 +08:00
|
|
|
double __u;
|
2011-09-16 07:15:27 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
double __u = ((const struct __mm_loadh_pd_struct *)__dp)->__u;
|
|
|
|
return __extension__(__m128d){__a[0], __u};
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Loads a double-precision value into the low-order bits of a 128-bit
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vector of [2 x double]. The high-order bits are copied from the
|
|
|
|
/// high-order bits of the first operand.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [2 x double]. \n
|
2016-10-23 15:30:50 +08:00
|
|
|
/// Bits [127:64] are written to bits [127:64] of the result.
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a 64-bit memory location containing a double-precision
|
|
|
|
/// floating-point value that is loaded. The loaded value is written to bits
|
|
|
|
/// [63:0] of the result. The address of the memory location does not have to
|
|
|
|
/// be aligned.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadl_pd(__m128d __a,
|
|
|
|
double const *__dp) {
|
2011-09-16 07:15:27 +08:00
|
|
|
struct __mm_loadl_pd_struct {
|
2013-01-17 07:08:36 +08:00
|
|
|
double __u;
|
2011-09-16 07:15:27 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
double __u = ((const struct __mm_loadl_pd_struct *)__dp)->__u;
|
|
|
|
return __extension__(__m128d){__u, __a[1]};
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit floating-point vector of [2 x double] with
|
2016-10-23 15:30:50 +08:00
|
|
|
/// unspecified content. This could be used as an argument to another
|
|
|
|
/// intrinsic function where the argument is required but the value is not
|
|
|
|
/// actually used.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic has no corresponding instruction.
|
|
|
|
///
|
|
|
|
/// \returns A 128-bit floating-point vector of [2 x double] with unspecified
|
|
|
|
/// content.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_undefined_pd(void) {
|
2015-08-27 05:17:12 +08:00
|
|
|
return (__m128d)__builtin_ia32_undef128();
|
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit floating-point vector of [2 x double]. The lower
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 64 bits of the vector are initialized with the specified double-precision
|
|
|
|
/// floating-point value. The upper 64 bits are set to zero.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __w
|
|
|
|
/// A double-precision floating-point value used to initialize the lower 64
|
|
|
|
/// bits of the result.
|
|
|
|
/// \returns An initialized 128-bit floating-point vector of [2 x double]. The
|
|
|
|
/// lower 64 bits contain the value of the parameter. The upper 64 bits are
|
|
|
|
/// set to zero.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_sd(double __w) {
|
|
|
|
return __extension__(__m128d){__w, 0};
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit floating-point vector of [2 x double], with each
|
2016-10-23 15:30:50 +08:00
|
|
|
/// of the two double-precision floating-point vector elements set to the
|
|
|
|
/// specified double-precision floating-point value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __w
|
|
|
|
/// A double-precision floating-point value used to initialize each vector
|
|
|
|
/// element of the result.
|
|
|
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set1_pd(double __w) {
|
|
|
|
return __extension__(__m128d){__w, __w};
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit floating-point vector of [2 x double], with each
|
2017-04-28 18:28:32 +08:00
|
|
|
/// of the two double-precision floating-point vector elements set to the
|
|
|
|
/// specified double-precision floating-point value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
|
|
|
|
///
|
|
|
|
/// \param __w
|
|
|
|
/// A double-precision floating-point value used to initialize each vector
|
|
|
|
/// element of the result.
|
|
|
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_pd1(double __w) {
|
2017-04-28 18:28:32 +08:00
|
|
|
return _mm_set1_pd(__w);
|
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit floating-point vector of [2 x double]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// initialized with the specified double-precision floating-point values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __w
|
|
|
|
/// A double-precision floating-point value used to initialize the upper 64
|
|
|
|
/// bits of the result.
|
|
|
|
/// \param __x
|
|
|
|
/// A double-precision floating-point value used to initialize the lower 64
|
|
|
|
/// bits of the result.
|
|
|
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_pd(double __w,
|
|
|
|
double __x) {
|
|
|
|
return __extension__(__m128d){__x, __w};
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit floating-point vector of [2 x double],
|
2016-10-23 15:30:50 +08:00
|
|
|
/// initialized in reverse order with the specified double-precision
|
|
|
|
/// floating-point values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __w
|
|
|
|
/// A double-precision floating-point value used to initialize the lower 64
|
|
|
|
/// bits of the result.
|
|
|
|
/// \param __x
|
|
|
|
/// A double-precision floating-point value used to initialize the upper 64
|
|
|
|
/// bits of the result.
|
|
|
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setr_pd(double __w,
|
|
|
|
double __x) {
|
|
|
|
return __extension__(__m128d){__w, __x};
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit floating-point vector of [2 x double]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// initialized to zero.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \returns An initialized 128-bit floating-point vector of [2 x double] with
|
|
|
|
/// all elements set to zero.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setzero_pd(void) {
|
|
|
|
return __extension__(__m128d){0, 0};
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit floating-point vector of [2 x double]. The lower
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 64 bits are set to the lower 64 bits of the second parameter. The upper
|
|
|
|
/// 64 bits are set to the upper 64 bits of the first parameter.
|
2017-03-21 21:34:06 +08:00
|
|
|
///
|
2016-10-23 15:30:50 +08:00
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VBLENDPD / BLENDPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The upper 64 bits are written to the
|
|
|
|
/// upper 64 bits of the result.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are written to the
|
|
|
|
/// lower 64 bits of the result.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_move_sd(__m128d __a,
|
|
|
|
__m128d __b) {
|
2018-07-10 08:37:25 +08:00
|
|
|
__a[0] = __b[0];
|
|
|
|
return __a;
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// memory location.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a 64-bit memory location.
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_sd(double *__dp,
|
|
|
|
__m128d __a) {
|
2011-09-16 07:15:27 +08:00
|
|
|
struct __mm_store_sd_struct {
|
2013-01-17 07:08:36 +08:00
|
|
|
double __u;
|
2011-09-16 07:15:27 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
((struct __mm_store_sd_struct *)__dp)->__u = __a[0];
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Moves packed double-precision values from a 128-bit vector of
|
2017-06-07 06:58:01 +08:00
|
|
|
/// [2 x double] to a memory location.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic corresponds to the <c>VMOVAPD / MOVAPS</c> instruction.
|
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to an aligned memory location that can store two
|
|
|
|
/// double-precision values.
|
|
|
|
/// \param __a
|
|
|
|
/// A packed 128-bit vector of [2 x double] containing the values to be
|
|
|
|
/// moved.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd(double *__dp,
|
|
|
|
__m128d __a) {
|
|
|
|
*(__m128d *)__dp = __a;
|
2016-05-31 01:55:25 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
|
2017-06-07 06:58:01 +08:00
|
|
|
/// the upper and lower 64 bits of a memory location.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// This intrinsic corresponds to the
|
|
|
|
/// <c> VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS </c> instruction.
|
2017-06-07 06:58:01 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a memory location that can store two double-precision
|
|
|
|
/// values.
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
|
2018-01-03 04:39:29 +08:00
|
|
|
/// of the values in \a __dp.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_store1_pd(double *__dp,
|
|
|
|
__m128d __a) {
|
2016-05-31 01:55:25 +08:00
|
|
|
__a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
|
|
|
|
_mm_store_pd(__dp, __a);
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
|
2018-01-03 04:39:29 +08:00
|
|
|
/// the upper and lower 64 bits of a memory location.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// This intrinsic corresponds to the
|
|
|
|
/// <c> VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
2018-01-03 04:39:29 +08:00
|
|
|
/// A pointer to a memory location that can store two double-precision
|
|
|
|
/// values.
|
2016-10-23 15:30:50 +08:00
|
|
|
/// \param __a
|
2018-01-03 04:39:29 +08:00
|
|
|
/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
|
|
|
|
/// of the values in \a __dp.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd1(double *__dp,
|
|
|
|
__m128d __a) {
|
2018-05-31 01:23:45 +08:00
|
|
|
_mm_store1_pd(__dp, __a);
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores a 128-bit vector of [2 x double] into an unaligned memory
|
2016-10-23 15:30:50 +08:00
|
|
|
/// location.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a 128-bit memory location. The address of the memory
|
|
|
|
/// location does not have to be aligned.
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing the values to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_pd(double *__dp,
|
|
|
|
__m128d __a) {
|
2016-05-31 01:10:30 +08:00
|
|
|
struct __storeu_pd {
|
2019-02-09 03:45:08 +08:00
|
|
|
__m128d_u __v;
|
2016-05-31 01:10:30 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
((struct __storeu_pd *)__dp)->__v = __a;
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores two double-precision values, in reverse order, from a 128-bit
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vector of [2 x double] to a 16-byte aligned memory location.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic corresponds to a shuffling instruction followed by a
|
2016-12-10 02:35:50 +08:00
|
|
|
/// <c> VMOVAPD / MOVAPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a 16-byte aligned memory location that can store two
|
|
|
|
/// double-precision values.
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing the values to be reversed and
|
|
|
|
/// stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_storer_pd(double *__dp,
|
|
|
|
__m128d __a) {
|
2016-05-16 14:38:42 +08:00
|
|
|
__a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 1, 0);
|
2013-01-17 07:08:36 +08:00
|
|
|
*(__m128d *)__dp = __a;
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores the upper 64 bits of a 128-bit vector of [2 x double] to a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// memory location.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a 64-bit memory location.
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeh_pd(double *__dp,
|
|
|
|
__m128d __a) {
|
2011-09-16 07:15:27 +08:00
|
|
|
struct __mm_storeh_pd_struct {
|
2013-01-17 07:08:36 +08:00
|
|
|
double __u;
|
2011-09-16 07:15:27 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
((struct __mm_storeh_pd_struct *)__dp)->__u = __a[1];
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// memory location.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __dp
|
|
|
|
/// A pointer to a 64-bit memory location.
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_pd(double *__dp,
|
|
|
|
__m128d __a) {
|
2011-09-16 07:15:27 +08:00
|
|
|
struct __mm_storeh_pd_struct {
|
2013-01-17 07:08:36 +08:00
|
|
|
double __u;
|
2011-09-16 07:15:27 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
((struct __mm_storeh_pd_struct *)__dp)->__u = __a[0];
|
2008-12-24 10:11:54 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Adds the corresponding elements of two 128-bit vectors of [16 x i8],
|
2016-10-23 15:30:50 +08:00
|
|
|
/// saving the lower 8 bits of each sum in the corresponding element of a
|
2017-05-15 11:25:04 +08:00
|
|
|
/// 128-bit result vector of [16 x i8].
|
|
|
|
///
|
|
|
|
/// The integer elements of both parameters can be either signed or unsigned.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPADDB / PADDB </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [16 x i8].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [16 x i8].
|
|
|
|
/// \returns A 128-bit vector of [16 x i8] containing the sums of both
|
|
|
|
/// parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v16qu)__a + (__v16qu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Adds the corresponding elements of two 128-bit vectors of [8 x i16],
|
2016-10-23 15:30:50 +08:00
|
|
|
/// saving the lower 16 bits of each sum in the corresponding element of a
|
2017-05-15 11:25:04 +08:00
|
|
|
/// 128-bit result vector of [8 x i16].
|
|
|
|
///
|
|
|
|
/// The integer elements of both parameters can be either signed or unsigned.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPADDW / PADDW </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [8 x i16].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [8 x i16].
|
|
|
|
/// \returns A 128-bit vector of [8 x i16] containing the sums of both
|
|
|
|
/// parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v8hu)__a + (__v8hu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Adds the corresponding elements of two 128-bit vectors of [4 x i32],
|
2016-10-23 15:30:50 +08:00
|
|
|
/// saving the lower 32 bits of each sum in the corresponding element of a
|
2017-05-15 11:25:04 +08:00
|
|
|
/// 128-bit result vector of [4 x i32].
|
|
|
|
///
|
|
|
|
/// The integer elements of both parameters can be either signed or unsigned.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPADDD / PADDD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [4 x i32].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [4 x i32].
|
|
|
|
/// \returns A 128-bit vector of [4 x i32] containing the sums of both
|
|
|
|
/// parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi32(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v4su)__a + (__v4su)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Adds two signed or unsigned 64-bit integer values, returning the
|
2016-10-23 15:30:50 +08:00
|
|
|
/// lower 64 bits of the sum.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> PADDQ </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 64-bit integer.
|
|
|
|
/// \param __b
|
|
|
|
/// A 64-bit integer.
|
|
|
|
/// \returns A 64-bit integer containing the sum of both parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_add_si64(__m64 __a,
|
|
|
|
__m64 __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m64)__builtin_ia32_paddq((__v1di)__a, (__v1di)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Adds the corresponding elements of two 128-bit vectors of [2 x i64],
|
2016-10-23 15:30:50 +08:00
|
|
|
/// saving the lower 64 bits of each sum in the corresponding element of a
|
2017-05-15 11:25:04 +08:00
|
|
|
/// 128-bit result vector of [2 x i64].
|
|
|
|
///
|
|
|
|
/// The integer elements of both parameters can be either signed or unsigned.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPADDQ / PADDQ </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x i64].
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [2 x i64].
|
|
|
|
/// \returns A 128-bit vector of [2 x i64] containing the sums of both
|
|
|
|
/// parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi64(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v2du)__a + (__v2du)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
2016-10-23 15:30:50 +08:00
|
|
|
/// signed [16 x i8] vectors, saving each sum in the corresponding element of
|
2018-02-16 11:11:35 +08:00
|
|
|
/// a 128-bit result vector of [16 x i8]. Positive sums greater than 0x7F are
|
|
|
|
/// saturated to 0x7F. Negative sums less than 0x80 are saturated to 0x80.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPADDSB / PADDSB </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit signed [16 x i8] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit signed [16 x i8] vector.
|
|
|
|
/// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of
|
|
|
|
/// both parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-02-08 22:59:59 +08:00
|
|
|
return (__m128i)__builtin_elementwise_add_sat((__v16qs)__a, (__v16qs)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
2016-10-23 15:30:50 +08:00
|
|
|
/// signed [8 x i16] vectors, saving each sum in the corresponding element of
|
2018-02-16 11:11:35 +08:00
|
|
|
/// a 128-bit result vector of [8 x i16]. Positive sums greater than 0x7FFF
|
|
|
|
/// are saturated to 0x7FFF. Negative sums less than 0x8000 are saturated to
|
|
|
|
/// 0x8000.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPADDSW / PADDSW </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of
|
|
|
|
/// both parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-02-08 22:59:59 +08:00
|
|
|
return (__m128i)__builtin_elementwise_add_sat((__v8hi)__a, (__v8hi)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
2016-10-23 15:30:50 +08:00
|
|
|
/// unsigned [16 x i8] vectors, saving each sum in the corresponding element
|
2018-02-16 11:11:35 +08:00
|
|
|
/// of a 128-bit result vector of [16 x i8]. Positive sums greater than 0xFF
|
|
|
|
/// are saturated to 0xFF. Negative sums are saturated to 0x00.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
|
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums
|
|
|
|
/// of both parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-02-08 22:59:59 +08:00
|
|
|
return (__m128i)__builtin_elementwise_add_sat((__v16qu)__a, (__v16qu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
2016-10-23 15:30:50 +08:00
|
|
|
/// unsigned [8 x i16] vectors, saving each sum in the corresponding element
|
2018-02-16 11:11:35 +08:00
|
|
|
/// of a 128-bit result vector of [8 x i16]. Positive sums greater than
|
|
|
|
/// 0xFFFF are saturated to 0xFFFF. Negative sums are saturated to 0x0000.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
|
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums
|
|
|
|
/// of both parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-02-08 22:59:59 +08:00
|
|
|
return (__m128i)__builtin_elementwise_add_sat((__v8hu)__a, (__v8hu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2019-10-27 17:39:45 +08:00
|
|
|
/// Computes the rounded averages of corresponding elements of two
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 128-bit unsigned [16 x i8] vectors, saving each result in the
|
|
|
|
/// corresponding element of a 128-bit result vector of [16 x i8].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPAVGB / PAVGB </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
|
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the rounded
|
|
|
|
/// averages of both parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2019-04-16 01:17:35 +08:00
|
|
|
return (__m128i)__builtin_ia32_pavgb128((__v16qi)__a, (__v16qi)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2019-10-27 17:39:45 +08:00
|
|
|
/// Computes the rounded averages of corresponding elements of two
|
2016-10-23 15:30:50 +08:00
|
|
|
/// 128-bit unsigned [8 x i16] vectors, saving each result in the
|
|
|
|
/// corresponding element of a 128-bit result vector of [8 x i16].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPAVGW / PAVGW </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
|
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the rounded
|
|
|
|
/// averages of both parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2019-04-16 01:17:35 +08:00
|
|
|
return (__m128i)__builtin_ia32_pavgw128((__v8hi)__a, (__v8hi)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Multiplies the corresponding elements of two 128-bit signed [8 x i16]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vectors, producing eight intermediate 32-bit signed integer products, and
|
|
|
|
/// adds the consecutive pairs of 32-bit products to form a 128-bit signed
|
2017-05-15 11:25:04 +08:00
|
|
|
/// [4 x i32] vector.
|
|
|
|
///
|
|
|
|
/// For example, bits [15:0] of both parameters are multiplied producing a
|
|
|
|
/// 32-bit product, bits [31:16] of both parameters are multiplied producing
|
|
|
|
/// a 32-bit product, and the sum of those two products becomes bits [31:0]
|
|
|
|
/// of the result.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPMADDWD / PMADDWD </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \returns A 128-bit signed [4 x i32] vector containing the sums of products
|
|
|
|
/// of both parameters.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_madd_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares corresponding elements of two 128-bit signed [8 x i16]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vectors, saving the greater value from each comparison in the
|
|
|
|
/// corresponding element of a 128-bit result vector of [8 x i16].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPMAXSW / PMAXSW </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \returns A 128-bit signed [8 x i16] vector containing the greater value of
|
|
|
|
/// each comparison.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-01-24 19:40:16 +08:00
|
|
|
return (__m128i)__builtin_elementwise_max((__v8hi)__a, (__v8hi)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares corresponding elements of two 128-bit unsigned [16 x i8]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vectors, saving the greater value from each comparison in the
|
|
|
|
/// corresponding element of a 128-bit result vector of [16 x i8].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPMAXUB / PMAXUB </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
|
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of
|
|
|
|
/// each comparison.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-01-24 19:40:16 +08:00
|
|
|
return (__m128i)__builtin_elementwise_max((__v16qu)__a, (__v16qu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares corresponding elements of two 128-bit signed [8 x i16]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vectors, saving the smaller value from each comparison in the
|
|
|
|
/// corresponding element of a 128-bit result vector of [8 x i16].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPMINSW / PMINSW </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \returns A 128-bit signed [8 x i16] vector containing the smaller value of
|
|
|
|
/// each comparison.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-01-24 19:40:16 +08:00
|
|
|
return (__m128i)__builtin_elementwise_min((__v8hi)__a, (__v8hi)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares corresponding elements of two 128-bit unsigned [16 x i8]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vectors, saving the smaller value from each comparison in the
|
|
|
|
/// corresponding element of a 128-bit result vector of [16 x i8].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPMINUB / PMINUB </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
|
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of
|
|
|
|
/// each comparison.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-01-24 19:40:16 +08:00
|
|
|
return (__m128i)__builtin_elementwise_min((__v16qu)__a, (__v16qu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Multiplies the corresponding elements of two signed [8 x i16]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vectors, saving the upper 16 bits of each 32-bit product in the
|
|
|
|
/// corresponding element of a 128-bit signed [8 x i16] result vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPMULHW / PMULHW </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of
|
|
|
|
/// each of the eight 32-bit products.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Multiplies the corresponding elements of two unsigned [8 x i16]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vectors, saving the upper 16 bits of each 32-bit product in the
|
|
|
|
/// corresponding element of a 128-bit unsigned [8 x i16] result vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPMULHUW / PMULHUW </c> instruction.
|
2016-10-23 15:30:50 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
|
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits
|
|
|
|
/// of each of the eight 32-bit products.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Multiplies the corresponding elements of two signed [8 x i16]
|
2016-10-23 15:30:50 +08:00
|
|
|
/// vectors, saving the lower 16 bits of each 32-bit product in the
|
|
|
|
/// corresponding element of a 128-bit signed [8 x i16] result vector.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPMULLW / PMULLW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
2016-10-23 15:30:50 +08:00
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \param __b
|
2016-10-23 15:30:50 +08:00
|
|
|
/// A 128-bit signed [8 x i16] vector.
|
|
|
|
/// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of
|
|
|
|
/// each of the eight 32-bit products.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v8hu)__a * (__v8hu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Multiplies 32-bit unsigned integer values contained in the lower bits
|
2016-04-09 04:45:48 +08:00
|
|
|
/// of the two 64-bit integer vectors and returns the 64-bit unsigned
|
|
|
|
/// product.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> PMULUDQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 64-bit integer containing one of the source operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A 64-bit integer containing one of the source operands.
|
|
|
|
/// \returns A 64-bit integer vector containing the product of both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_mul_su32(__m64 __a,
|
|
|
|
__m64 __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return __builtin_ia32_pmuludq((__v2si)__a, (__v2si)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Multiplies 32-bit unsigned integer values contained in the lower
|
2016-04-09 04:45:48 +08:00
|
|
|
/// bits of the corresponding elements of two [2 x i64] vectors, and returns
|
|
|
|
/// the 64-bit products in the corresponding elements of a [2 x i64] vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPMULUDQ / PMULUDQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A [2 x i64] vector containing one of the source operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A [2 x i64] vector containing one of the source operands.
|
|
|
|
/// \returns A [2 x i64] vector containing the product of both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mul_epu32(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Computes the absolute differences of corresponding 8-bit integer
|
2016-04-09 04:45:48 +08:00
|
|
|
/// values in two 128-bit vectors. Sums the first 8 absolute differences, and
|
2017-02-17 10:49:50 +08:00
|
|
|
/// separately sums the second 8 absolute differences. Packs these two
|
2016-04-09 04:45:48 +08:00
|
|
|
/// unsigned 16-bit integer sums into the upper and lower elements of a
|
|
|
|
/// [2 x i64] vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSADBW / PSADBW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing one of the source operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing one of the source operands.
|
|
|
|
/// \returns A [2 x i64] vector containing the sums of the sets of absolute
|
|
|
|
/// differences between both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sad_epu8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return __builtin_ia32_psadbw128((__v16qi)__a, (__v16qi)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Subtracts the corresponding 8-bit integer values in the operands.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSUBB / PSUBB </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the minuends.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the subtrahends.
|
|
|
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
|
|
/// in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v16qu)__a - (__v16qu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Subtracts the corresponding 16-bit integer values in the operands.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSUBW / PSUBW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the minuends.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the subtrahends.
|
|
|
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
|
|
/// in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v8hu)__a - (__v8hu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Subtracts the corresponding 32-bit integer values in the operands.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSUBD / PSUBD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the minuends.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the subtrahends.
|
|
|
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
|
|
/// in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi32(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v4su)__a - (__v4su)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Subtracts signed or unsigned 64-bit integer values and writes the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// difference to the corresponding bits in the destination.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> PSUBQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 64-bit integer vector containing the minuend.
|
|
|
|
/// \param __b
|
|
|
|
/// A 64-bit integer vector containing the subtrahend.
|
|
|
|
/// \returns A 64-bit integer vector containing the difference of the values in
|
|
|
|
/// the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_sub_si64(__m64 __a,
|
|
|
|
__m64 __b) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m64)__builtin_ia32_psubq((__v1di)__a, (__v1di)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Subtracts the corresponding elements of two [2 x i64] vectors.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSUBQ / PSUBQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the minuends.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the subtrahends.
|
|
|
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
|
|
/// in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi64(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v2du)__a - (__v2du)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Subtracts corresponding 8-bit signed integer values in the input and
|
2016-04-09 04:45:48 +08:00
|
|
|
/// returns the differences in the corresponding bytes in the destination.
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Differences greater than 0x7F are saturated to 0x7F, and differences less
|
|
|
|
/// than 0x80 are saturated to 0x80.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSUBSB / PSUBSB </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the minuends.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the subtrahends.
|
|
|
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
|
|
/// in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-02-08 22:59:59 +08:00
|
|
|
return (__m128i)__builtin_elementwise_sub_sat((__v16qs)__a, (__v16qs)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Subtracts corresponding 16-bit signed integer values in the input and
|
2016-04-09 04:45:48 +08:00
|
|
|
/// returns the differences in the corresponding bytes in the destination.
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Differences greater than 0x7FFF are saturated to 0x7FFF, and values less
|
|
|
|
/// than 0x8000 are saturated to 0x8000.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSUBSW / PSUBSW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the minuends.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the subtrahends.
|
|
|
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
|
|
/// in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-02-08 22:59:59 +08:00
|
|
|
return (__m128i)__builtin_elementwise_sub_sat((__v8hi)__a, (__v8hi)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Subtracts corresponding 8-bit unsigned integer values in the input
|
2016-04-09 04:45:48 +08:00
|
|
|
/// and returns the differences in the corresponding bytes in the
|
2018-02-16 11:11:35 +08:00
|
|
|
/// destination. Differences less than 0x00 are saturated to 0x00.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSUBUSB / PSUBUSB </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the minuends.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the subtrahends.
|
|
|
|
/// \returns A 128-bit integer vector containing the unsigned integer
|
|
|
|
/// differences of the values in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-02-08 22:59:59 +08:00
|
|
|
return (__m128i)__builtin_elementwise_sub_sat((__v16qu)__a, (__v16qu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Subtracts corresponding 16-bit unsigned integer values in the input
|
2016-04-09 04:45:48 +08:00
|
|
|
/// and returns the differences in the corresponding bytes in the
|
2018-02-16 11:11:35 +08:00
|
|
|
/// destination. Differences less than 0x0000 are saturated to 0x0000.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSUBUSW / PSUBUSW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the minuends.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the subtrahends.
|
|
|
|
/// \returns A 128-bit integer vector containing the unsigned integer
|
|
|
|
/// differences of the values in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2022-02-08 22:59:59 +08:00
|
|
|
return (__m128i)__builtin_elementwise_sub_sat((__v8hu)__a, (__v8hu)__b);
|
2008-12-24 10:41:00 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Performs a bitwise AND of two 128-bit integer vectors.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing one of the source operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing one of the source operands.
|
|
|
|
/// \returns A 128-bit integer vector containing the bitwise AND of the values
|
|
|
|
/// in both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_and_si128(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v2du)__a & (__v2du)__b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Performs a bitwise AND of two 128-bit integer vectors, using the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// one's complement of the values contained in the first source operand.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector containing the left source operand. The one's complement
|
|
|
|
/// of this value is used in the bitwise AND.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector containing the right source operand.
|
|
|
|
/// \returns A 128-bit integer vector containing the bitwise AND of the one's
|
|
|
|
/// complement of the first operand and the values in the second operand.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_andnot_si128(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)(~(__v2du)__a & (__v2du)__b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Performs a bitwise OR of two 128-bit integer vectors.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing one of the source operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing one of the source operands.
|
|
|
|
/// \returns A 128-bit integer vector containing the bitwise OR of the values
|
|
|
|
/// in both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_or_si128(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v2du)__a | (__v2du)__b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Performs a bitwise exclusive OR of two 128-bit integer vectors.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing one of the source operands.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing one of the source operands.
|
|
|
|
/// \returns A 128-bit integer vector containing the bitwise exclusive OR of the
|
|
|
|
/// values in both operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a,
|
|
|
|
__m128i __b) {
|
2016-06-04 13:43:41 +08:00
|
|
|
return (__m128i)((__v2du)__a ^ (__v2du)__b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Left-shifts the 128-bit integer vector operand by the specified
|
2016-04-09 04:45:48 +08:00
|
|
|
/// number of bytes. Low-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// \code
|
|
|
|
/// __m128i _mm_slli_si128(__m128i a, const int imm);
|
|
|
|
/// \endcode
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSLLDQ / PSLLDQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param imm
|
2016-12-27 08:49:38 +08:00
|
|
|
/// An immediate value specifying the number of bytes to left-shift operand
|
|
|
|
/// \a a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the left-shifted value.
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_slli_si128(a, imm) \
|
|
|
|
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
|
|
(int)(imm)))
|
2008-12-26 07:48:58 +08:00
|
|
|
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_bslli_si128(a, imm) \
|
|
|
|
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
|
|
(int)(imm)))
|
2015-02-13 14:04:45 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Left-shifts each 16-bit value in the 128-bit integer vector operand
|
2016-04-09 04:45:48 +08:00
|
|
|
/// by the specified number of bits. Low-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// An integer value specifying the number of bits to left-shift each value
|
2016-12-09 06:10:51 +08:00
|
|
|
/// in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi16(__m128i __a,
|
|
|
|
int __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Left-shifts each 16-bit value in the 128-bit integer vector operand
|
2016-04-09 04:45:48 +08:00
|
|
|
/// by the specified number of bits. Low-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
2016-12-09 06:10:51 +08:00
|
|
|
/// to left-shift each value in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi16(__m128i __a,
|
|
|
|
__m128i __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Left-shifts each 32-bit value in the 128-bit integer vector operand
|
2016-04-09 04:45:48 +08:00
|
|
|
/// by the specified number of bits. Low-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// An integer value specifying the number of bits to left-shift each value
|
2016-12-09 06:10:51 +08:00
|
|
|
/// in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi32(__m128i __a,
|
|
|
|
int __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Left-shifts each 32-bit value in the 128-bit integer vector operand
|
2016-04-09 04:45:48 +08:00
|
|
|
/// by the specified number of bits. Low-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
2016-12-09 06:10:51 +08:00
|
|
|
/// to left-shift each value in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a,
|
|
|
|
__m128i __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Left-shifts each 64-bit value in the 128-bit integer vector operand
|
2016-04-09 04:45:48 +08:00
|
|
|
/// by the specified number of bits. Low-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// An integer value specifying the number of bits to left-shift each value
|
2016-12-09 06:10:51 +08:00
|
|
|
/// in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi64(__m128i __a,
|
|
|
|
int __count) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_psllqi128((__v2di)__a, __count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Left-shifts each 64-bit value in the 128-bit integer vector operand
|
2016-04-09 04:45:48 +08:00
|
|
|
/// by the specified number of bits. Low-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
2016-12-09 06:10:51 +08:00
|
|
|
/// to left-shift each value in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a,
|
|
|
|
__m128i __count) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts each 16-bit value in the 128-bit integer vector operand
|
2016-04-09 04:45:48 +08:00
|
|
|
/// by the specified number of bits. High-order bits are filled with the sign
|
|
|
|
/// bit of the initial value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// An integer value specifying the number of bits to right-shift each value
|
2016-12-09 06:10:51 +08:00
|
|
|
/// in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi16(__m128i __a,
|
|
|
|
int __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts each 16-bit value in the 128-bit integer vector operand
|
2016-04-09 04:45:48 +08:00
|
|
|
/// by the specified number of bits. High-order bits are filled with the sign
|
|
|
|
/// bit of the initial value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
2016-12-09 06:10:51 +08:00
|
|
|
/// to right-shift each value in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi16(__m128i __a,
|
|
|
|
__m128i __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts each 32-bit value in the 128-bit integer vector operand
|
2016-04-09 04:45:48 +08:00
|
|
|
/// by the specified number of bits. High-order bits are filled with the sign
|
|
|
|
/// bit of the initial value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// An integer value specifying the number of bits to right-shift each value
|
2016-12-09 06:10:51 +08:00
|
|
|
/// in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi32(__m128i __a,
|
|
|
|
int __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts each 32-bit value in the 128-bit integer vector operand
|
2016-04-09 04:45:48 +08:00
|
|
|
/// by the specified number of bits. High-order bits are filled with the sign
|
|
|
|
/// bit of the initial value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
2016-12-09 06:10:51 +08:00
|
|
|
/// to right-shift each value in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a,
|
|
|
|
__m128i __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts the 128-bit integer vector operand by the specified
|
2016-04-09 04:45:48 +08:00
|
|
|
/// number of bytes. High-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// \code
|
|
|
|
/// __m128i _mm_srli_si128(__m128i a, const int imm);
|
|
|
|
/// \endcode
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRLDQ / PSRLDQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param imm
|
|
|
|
/// An immediate value specifying the number of bytes to right-shift operand
|
2016-12-09 06:10:51 +08:00
|
|
|
/// \a a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted value.
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_srli_si128(a, imm) \
|
|
|
|
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
|
|
(int)(imm)))
|
2008-12-26 07:48:58 +08:00
|
|
|
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_bsrli_si128(a, imm) \
|
|
|
|
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
|
|
(int)(imm)))
|
2015-02-13 14:04:45 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts each of 16-bit values in the 128-bit integer vector
|
2016-04-09 04:45:48 +08:00
|
|
|
/// operand by the specified number of bits. High-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// An integer value specifying the number of bits to right-shift each value
|
2016-12-09 06:10:51 +08:00
|
|
|
/// in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi16(__m128i __a,
|
|
|
|
int __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts each of 16-bit values in the 128-bit integer vector
|
2016-04-09 04:45:48 +08:00
|
|
|
/// operand by the specified number of bits. High-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
2016-12-09 06:10:51 +08:00
|
|
|
/// to right-shift each value in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi16(__m128i __a,
|
|
|
|
__m128i __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts each of 32-bit values in the 128-bit integer vector
|
2016-04-09 04:45:48 +08:00
|
|
|
/// operand by the specified number of bits. High-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// An integer value specifying the number of bits to right-shift each value
|
2016-12-09 06:10:51 +08:00
|
|
|
/// in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi32(__m128i __a,
|
|
|
|
int __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts each of 32-bit values in the 128-bit integer vector
|
2016-04-09 04:45:48 +08:00
|
|
|
/// operand by the specified number of bits. High-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
2016-12-09 06:10:51 +08:00
|
|
|
/// to right-shift each value in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a,
|
|
|
|
__m128i __count) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts each of 64-bit values in the 128-bit integer vector
|
2016-04-09 04:45:48 +08:00
|
|
|
/// operand by the specified number of bits. High-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// An integer value specifying the number of bits to right-shift each value
|
2016-12-09 06:10:51 +08:00
|
|
|
/// in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi64(__m128i __a,
|
|
|
|
int __count) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_psrlqi128((__v2di)__a, __count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Right-shifts each of 64-bit values in the 128-bit integer vector
|
2016-04-09 04:45:48 +08:00
|
|
|
/// operand by the specified number of bits. High-order bits are cleared.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the source operand.
|
|
|
|
/// \param __count
|
|
|
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
2016-12-09 06:10:51 +08:00
|
|
|
/// to right-shift each value in operand \a __a.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a,
|
|
|
|
__m128i __count) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding 8-bit values of the 128-bit
|
2018-02-16 11:11:35 +08:00
|
|
|
/// integer vectors for equality. Each comparison yields 0x0 for false, 0xFF
|
2016-04-09 04:45:48 +08:00
|
|
|
/// for true.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPCMPEQB / PCMPEQB </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit integer vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)((__v16qi)__a == (__v16qi)__b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding 16-bit values of the 128-bit
|
2018-02-16 11:11:35 +08:00
|
|
|
/// integer vectors for equality. Each comparison yields 0x0 for false,
|
|
|
|
/// 0xFFFF for true.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPCMPEQW / PCMPEQW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit integer vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)((__v8hi)__a == (__v8hi)__b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding 32-bit values of the 128-bit
|
2018-02-16 11:11:35 +08:00
|
|
|
/// integer vectors for equality. Each comparison yields 0x0 for false,
|
|
|
|
/// 0xFFFFFFFF for true.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPCMPEQD / PCMPEQD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit integer vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi32(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)((__v4si)__a == (__v4si)__b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding signed 8-bit values of the 128-bit
|
2016-04-09 04:45:48 +08:00
|
|
|
/// integer vectors to determine if the values in the first operand are
|
2018-02-16 11:11:35 +08:00
|
|
|
/// greater than those in the second operand. Each comparison yields 0x0 for
|
|
|
|
/// false, 0xFF for true.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit integer vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2012-02-04 10:16:48 +08:00
|
|
|
/* This function always performs a signed comparison, but __v16qi is a char
|
Fix the SSE4 byte sign extension in a cleaner way, and more thoroughly
test that our intrinsics behave the same under -fsigned-char and
-funsigned-char.
This further testing uncovered that AVX-2 has a broken cmpgt for 8-bit
elements, and has for a long time. This is fixed in the same way as
SSE4 handles the case.
The other ISA extensions currently work correctly because they use
specific instruction intrinsics. As soon as they are rewritten in terms
of generic IR, they will need to add these special casts. I've added the
necessary testing to catch this however, so we shouldn't have to chase
it down again.
I considered changing the core typedef to be signed, but that seems like
a bad idea. Notably, it would be an ABI break if anyone is reaching into
the innards of the intrinsic headers and passing __v16qi on an API
boundary. I can't be completely confident that this wouldn't happen due
to a macro expanding in a lambda, etc., so it seems much better to leave
it alone. It also matches GCC's behavior exactly.
A fun side note is that for both GCC and Clang, -funsigned-char really
does change the semantics of __v16qi. To observe this, consider:
% cat x.cc
#include <smmintrin.h>
#include <iostream>
int main() {
__v16qi a = { 1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
__v16qi b = _mm_set1_epi8(-1);
std::cout << (int)(a / b)[0] << ", " << (int)(a / b)[1] << '\n';
}
% clang++ -o x x.cc && ./x
-1, 1
% clang++ -funsigned-char -o x x.cc && ./x
0, 1
However, while this may be surprising, both Clang and GCC agree.
Differential Revision: http://reviews.llvm.org/D13324
llvm-svn: 249097
2015-10-02 07:40:12 +08:00
|
|
|
which may be signed or unsigned, so use __v16qs. */
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)((__v16qs)__a > (__v16qs)__b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding signed 16-bit values of the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// 128-bit integer vectors to determine if the values in the first operand
|
2017-05-15 11:25:04 +08:00
|
|
|
/// are greater than those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFF for true.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit integer vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)((__v8hi)__a > (__v8hi)__b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding signed 32-bit values of the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// 128-bit integer vectors to determine if the values in the first operand
|
2017-05-15 11:25:04 +08:00
|
|
|
/// are greater than those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFFFFFF for true.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit integer vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi32(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)((__v4si)__a > (__v4si)__b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding signed 8-bit values of the 128-bit
|
2016-04-09 04:45:48 +08:00
|
|
|
/// integer vectors to determine if the values in the first operand are less
|
2017-05-15 11:25:04 +08:00
|
|
|
/// than those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFF for true.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit integer vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi8(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return _mm_cmpgt_epi8(__b, __a);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding signed 16-bit values of the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// 128-bit integer vectors to determine if the values in the first operand
|
2017-05-15 11:25:04 +08:00
|
|
|
/// are less than those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFF for true.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit integer vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return _mm_cmpgt_epi16(__b, __a);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Compares each of the corresponding signed 32-bit values of the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// 128-bit integer vectors to determine if the values in the first operand
|
2017-05-15 11:25:04 +08:00
|
|
|
/// are less than those in the second operand.
|
|
|
|
///
|
2018-02-16 11:11:35 +08:00
|
|
|
/// Each comparison yields 0x0 for false, 0xFFFFFFFF for true.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit integer vector containing the comparison results.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi32(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return _mm_cmpgt_epi32(__b, __a);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef __x86_64__
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts a 64-bit signed integer value from the second operand into a
|
2016-04-09 04:45:48 +08:00
|
|
|
/// double-precision value and returns it in the lower element of a [2 x
|
|
|
|
/// double] vector; the upper element of the returned vector is copied from
|
|
|
|
/// the upper element of the first operand.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The upper 64 bits of this operand are
|
|
|
|
/// copied to the upper 64 bits of the destination.
|
|
|
|
/// \param __b
|
|
|
|
/// A 64-bit signed integer operand containing the value to be converted.
|
|
|
|
/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
|
|
|
/// converted value of the second operand. The upper 64 bits are copied from
|
|
|
|
/// the upper 64 bits of the first operand.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtsi64_sd(__m128d __a,
|
|
|
|
long long __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
__a[0] = __b;
|
|
|
|
return __a;
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the first (lower) element of a vector of [2 x double] into a
|
2016-04-09 04:45:48 +08:00
|
|
|
/// 64-bit signed integer value, according to the current rounding mode.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
|
|
/// conversion.
|
|
|
|
/// \returns A 64-bit signed integer containing the converted value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsd_si64(__m128d __a) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return __builtin_ia32_cvtsd2si64((__v2df)__a);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts the first (lower) element of a vector of [2 x double] into a
|
2016-04-09 04:45:48 +08:00
|
|
|
/// 64-bit signed integer value, truncating the result when it is inexact.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>
|
|
|
|
/// instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
|
|
/// conversion.
|
|
|
|
/// \returns A 64-bit signed integer containing the converted value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvttsd_si64(__m128d __a) {
|
2016-07-20 18:18:01 +08:00
|
|
|
return __builtin_ia32_cvttsd2si64((__v2df)__a);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts a vector of [4 x i32] into a vector of [4 x float].
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTDQ2PS / CVTDQ2PS </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit vector of [4 x float] containing the converted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtepi32_ps(__m128i __a) {
|
|
|
|
return (__m128) __builtin_convertvector((__v4si)__a, __v4sf);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts a vector of [4 x float] into a vector of [4 x i32].
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTPS2DQ / CVTPS2DQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [4 x float].
|
|
|
|
/// \returns A 128-bit integer vector of [4 x i32] containing the converted
|
|
|
|
/// values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epi32(__m128 __a) {
|
2016-05-16 14:38:42 +08:00
|
|
|
return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts a vector of [4 x float] into a vector of [4 x i32],
|
2016-04-09 04:45:48 +08:00
|
|
|
/// truncating the result when it is inexact.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VCVTTPS2DQ / CVTTPS2DQ </c>
|
|
|
|
/// instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [4 x float].
|
|
|
|
/// \returns A 128-bit vector of [4 x i32] containing the converted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a) {
|
2016-07-20 18:18:01 +08:00
|
|
|
return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Returns a vector of [4 x i32] where the lowest element is the input
|
2016-04-09 04:45:48 +08:00
|
|
|
/// operand and the remaining elements are zero.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 32-bit signed integer operand.
|
|
|
|
/// \returns A 128-bit vector of [4 x i32].
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) {
|
|
|
|
return __extension__(__m128i)(__v4si){__a, 0, 0, 0};
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2022-04-22 09:11:40 +08:00
|
|
|
#ifdef __x86_64__
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Returns a vector of [2 x i64] where the lower element is the input
|
2016-04-09 04:45:48 +08:00
|
|
|
/// operand and the upper element is zero.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2022-04-22 09:11:40 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 64-bit signed integer operand containing the value to be converted.
|
|
|
|
/// \returns A 128-bit vector of [2 x i64] containing the converted value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) {
|
|
|
|
return __extension__(__m128i)(__v2di){__a, 0};
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
2022-04-22 09:11:40 +08:00
|
|
|
#endif
|
2008-12-26 07:48:58 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Moves the least significant 32 bits of a vector of [4 x i32] to a
|
2016-04-09 04:45:48 +08:00
|
|
|
/// 32-bit signed integer value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A vector of [4 x i32]. The least significant 32 bits are moved to the
|
|
|
|
/// destination.
|
|
|
|
/// \returns A 32-bit signed integer containing the moved value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) {
|
2013-01-17 07:08:36 +08:00
|
|
|
__v4si __b = (__v4si)__a;
|
|
|
|
return __b[0];
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2022-04-22 09:11:40 +08:00
|
|
|
#ifdef __x86_64__
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Moves the least significant 64 bits of a vector of [2 x i64] to a
|
2016-04-09 04:45:48 +08:00
|
|
|
/// 64-bit signed integer value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A vector of [2 x i64]. The least significant 64 bits are moved to the
|
|
|
|
/// destination.
|
|
|
|
/// \returns A 64-bit signed integer containing the moved value.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsi128_si64(__m128i __a) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return __a[0];
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
2022-04-22 09:11:40 +08:00
|
|
|
#endif
|
2008-12-26 07:48:58 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Moves packed integer values from an aligned 128-bit memory location
|
2016-04-09 04:45:48 +08:00
|
|
|
/// to elements in a 128-bit integer vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVDQA / MOVDQA </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// An aligned pointer to a memory location containing integer values.
|
|
|
|
/// \returns A 128-bit integer vector containing the moved values.
|
2015-06-30 21:36:19 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
2022-04-22 09:18:41 +08:00
|
|
|
_mm_load_si128(__m128i const *__p) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return *__p;
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Moves packed integer values from an unaligned 128-bit memory location
|
2016-04-09 04:45:48 +08:00
|
|
|
/// to elements in a 128-bit integer vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVDQU / MOVDQU </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to a memory location containing integer values.
|
|
|
|
/// \returns A 128-bit integer vector containing the moved values.
|
2015-06-30 21:36:19 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
2022-04-22 09:18:41 +08:00
|
|
|
_mm_loadu_si128(__m128i_u const *__p) {
|
2011-05-13 08:11:39 +08:00
|
|
|
struct __loadu_si128 {
|
2019-02-09 03:45:08 +08:00
|
|
|
__m128i_u __v;
|
2015-02-04 08:26:10 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
return ((const struct __loadu_si128 *)__p)->__v;
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Returns a vector of [2 x i64] where the lower element is taken from
|
2016-04-09 04:45:48 +08:00
|
|
|
/// the lower element of the operand, and the upper element is zero.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
|
2016-04-09 04:45:48 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A 128-bit vector of [2 x i64]. Bits [63:0] are written to bits [63:0] of
|
|
|
|
/// the destination.
|
|
|
|
/// \returns A 128-bit vector of [2 x i64]. The lower order bits contain the
|
|
|
|
/// moved value. The higher order bits are cleared.
|
2015-06-30 21:36:19 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
2022-04-22 09:18:41 +08:00
|
|
|
_mm_loadl_epi64(__m128i_u const *__p) {
|
2011-09-16 07:15:27 +08:00
|
|
|
struct __mm_loadl_epi64_struct {
|
2013-01-17 07:08:36 +08:00
|
|
|
long long __u;
|
2011-09-16 07:15:27 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
return __extension__(__m128i){
|
|
|
|
((const struct __mm_loadl_epi64_struct *)__p)->__u, 0};
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Generates a 128-bit vector of [4 x i32] with unspecified content.
|
2016-04-09 04:45:48 +08:00
|
|
|
/// This could be used as an argument to another intrinsic function where the
|
|
|
|
/// argument is required but the value is not actually used.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic has no corresponding instruction.
|
|
|
|
///
|
|
|
|
/// \returns A 128-bit vector of [4 x i32] with unspecified content.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_undefined_si128(void) {
|
2015-08-27 05:17:12 +08:00
|
|
|
return (__m128i)__builtin_ia32_undef128();
|
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
|
2016-04-09 04:45:48 +08:00
|
|
|
/// the specified 64-bit integer values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __q1
|
|
|
|
/// A 64-bit integer value used to initialize the upper 64 bits of the
|
|
|
|
/// destination vector of [2 x i64].
|
|
|
|
/// \param __q0
|
|
|
|
/// A 64-bit integer value used to initialize the lower 64 bits of the
|
|
|
|
/// destination vector of [2 x i64].
|
|
|
|
/// \returns An initialized 128-bit vector of [2 x i64] containing the values
|
|
|
|
/// provided in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi64x(long long __q1,
|
|
|
|
long long __q0) {
|
|
|
|
return __extension__(__m128i)(__v2di){__q0, __q1};
|
2009-09-19 01:03:55 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
|
2016-04-09 04:45:48 +08:00
|
|
|
/// the specified 64-bit integer values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __q1
|
|
|
|
/// A 64-bit integer value used to initialize the upper 64 bits of the
|
|
|
|
/// destination vector of [2 x i64].
|
|
|
|
/// \param __q0
|
|
|
|
/// A 64-bit integer value used to initialize the lower 64 bits of the
|
|
|
|
/// destination vector of [2 x i64].
|
|
|
|
/// \returns An initialized 128-bit vector of [2 x i64] containing the values
|
|
|
|
/// provided in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi64(__m64 __q1,
|
|
|
|
__m64 __q0) {
|
2018-05-31 09:51:07 +08:00
|
|
|
return _mm_set_epi64x((long long)__q1, (long long)__q0);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Initializes the 32-bit values in a 128-bit vector of [4 x i32] with
|
2016-04-09 04:45:48 +08:00
|
|
|
/// the specified 32-bit integer values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __i3
|
|
|
|
/// A 32-bit integer value used to initialize bits [127:96] of the
|
|
|
|
/// destination vector.
|
|
|
|
/// \param __i2
|
|
|
|
/// A 32-bit integer value used to initialize bits [95:64] of the destination
|
|
|
|
/// vector.
|
|
|
|
/// \param __i1
|
|
|
|
/// A 32-bit integer value used to initialize bits [63:32] of the destination
|
|
|
|
/// vector.
|
|
|
|
/// \param __i0
|
|
|
|
/// A 32-bit integer value used to initialize bits [31:0] of the destination
|
|
|
|
/// vector.
|
|
|
|
/// \returns An initialized 128-bit vector of [4 x i32] containing the values
|
|
|
|
/// provided in the operands.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi32(int __i3, int __i2,
|
|
|
|
int __i1, int __i0) {
|
|
|
|
return __extension__(__m128i)(__v4si){__i0, __i1, __i2, __i3};
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Initializes the 16-bit values in a 128-bit vector of [8 x i16] with
|
2016-04-09 04:45:48 +08:00
|
|
|
/// the specified 16-bit integer values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __w7
|
|
|
|
/// A 16-bit integer value used to initialize bits [127:112] of the
|
|
|
|
/// destination vector.
|
|
|
|
/// \param __w6
|
|
|
|
/// A 16-bit integer value used to initialize bits [111:96] of the
|
|
|
|
/// destination vector.
|
|
|
|
/// \param __w5
|
|
|
|
/// A 16-bit integer value used to initialize bits [95:80] of the destination
|
|
|
|
/// vector.
|
|
|
|
/// \param __w4
|
|
|
|
/// A 16-bit integer value used to initialize bits [79:64] of the destination
|
|
|
|
/// vector.
|
|
|
|
/// \param __w3
|
|
|
|
/// A 16-bit integer value used to initialize bits [63:48] of the destination
|
|
|
|
/// vector.
|
|
|
|
/// \param __w2
|
|
|
|
/// A 16-bit integer value used to initialize bits [47:32] of the destination
|
|
|
|
/// vector.
|
|
|
|
/// \param __w1
|
|
|
|
/// A 16-bit integer value used to initialize bits [31:16] of the destination
|
|
|
|
/// vector.
|
|
|
|
/// \param __w0
|
|
|
|
/// A 16-bit integer value used to initialize bits [15:0] of the destination
|
|
|
|
/// vector.
|
|
|
|
/// \returns An initialized 128-bit vector of [8 x i16] containing the values
|
|
|
|
/// provided in the operands.
|
2015-06-30 21:36:19 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
2022-04-22 09:18:41 +08:00
|
|
|
_mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3,
|
|
|
|
short __w2, short __w1, short __w0) {
|
|
|
|
return __extension__(__m128i)(__v8hi){__w0, __w1, __w2, __w3,
|
|
|
|
__w4, __w5, __w6, __w7};
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Initializes the 8-bit values in a 128-bit vector of [16 x i8] with
|
2016-04-09 04:45:48 +08:00
|
|
|
/// the specified 8-bit integer values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __b15
|
|
|
|
/// Initializes bits [127:120] of the destination vector.
|
|
|
|
/// \param __b14
|
|
|
|
/// Initializes bits [119:112] of the destination vector.
|
|
|
|
/// \param __b13
|
|
|
|
/// Initializes bits [111:104] of the destination vector.
|
|
|
|
/// \param __b12
|
|
|
|
/// Initializes bits [103:96] of the destination vector.
|
|
|
|
/// \param __b11
|
|
|
|
/// Initializes bits [95:88] of the destination vector.
|
|
|
|
/// \param __b10
|
|
|
|
/// Initializes bits [87:80] of the destination vector.
|
|
|
|
/// \param __b9
|
|
|
|
/// Initializes bits [79:72] of the destination vector.
|
|
|
|
/// \param __b8
|
|
|
|
/// Initializes bits [71:64] of the destination vector.
|
|
|
|
/// \param __b7
|
|
|
|
/// Initializes bits [63:56] of the destination vector.
|
|
|
|
/// \param __b6
|
|
|
|
/// Initializes bits [55:48] of the destination vector.
|
|
|
|
/// \param __b5
|
|
|
|
/// Initializes bits [47:40] of the destination vector.
|
|
|
|
/// \param __b4
|
|
|
|
/// Initializes bits [39:32] of the destination vector.
|
|
|
|
/// \param __b3
|
|
|
|
/// Initializes bits [31:24] of the destination vector.
|
|
|
|
/// \param __b2
|
|
|
|
/// Initializes bits [23:16] of the destination vector.
|
|
|
|
/// \param __b1
|
|
|
|
/// Initializes bits [15:8] of the destination vector.
|
|
|
|
/// \param __b0
|
|
|
|
/// Initializes bits [7:0] of the destination vector.
|
|
|
|
/// \returns An initialized 128-bit vector of [16 x i8] containing the values
|
|
|
|
/// provided in the operands.
|
2015-06-30 21:36:19 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
2022-04-22 09:18:41 +08:00
|
|
|
_mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11,
|
|
|
|
char __b10, char __b9, char __b8, char __b7, char __b6, char __b5,
|
|
|
|
char __b4, char __b3, char __b2, char __b1, char __b0) {
|
|
|
|
return __extension__(__m128i)(__v16qi){
|
|
|
|
__b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7,
|
|
|
|
__b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15};
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Initializes both values in a 128-bit integer vector with the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// specified 64-bit integer value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __q
|
|
|
|
/// Integer value used to initialize the elements of the destination integer
|
|
|
|
/// vector.
|
|
|
|
/// \returns An initialized 128-bit integer vector of [2 x i64] with both
|
|
|
|
/// elements containing the value provided in the operand.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi64x(long long __q) {
|
2018-05-31 05:08:27 +08:00
|
|
|
return _mm_set_epi64x(__q, __q);
|
2009-09-19 01:03:55 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Initializes both values in a 128-bit vector of [2 x i64] with the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// specified 64-bit value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __q
|
|
|
|
/// A 64-bit value used to initialize the elements of the destination integer
|
|
|
|
/// vector.
|
|
|
|
/// \returns An initialized 128-bit vector of [2 x i64] with all elements
|
|
|
|
/// containing the value provided in the operand.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi64(__m64 __q) {
|
2018-05-31 05:08:27 +08:00
|
|
|
return _mm_set_epi64(__q, __q);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Initializes all values in a 128-bit vector of [4 x i32] with the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// specified 32-bit value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __i
|
|
|
|
/// A 32-bit value used to initialize the elements of the destination integer
|
|
|
|
/// vector.
|
|
|
|
/// \returns An initialized 128-bit vector of [4 x i32] with all elements
|
|
|
|
/// containing the value provided in the operand.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi32(int __i) {
|
2018-05-31 05:08:27 +08:00
|
|
|
return _mm_set_epi32(__i, __i, __i, __i);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Initializes all values in a 128-bit vector of [8 x i16] with the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// specified 16-bit value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __w
|
|
|
|
/// A 16-bit value used to initialize the elements of the destination integer
|
|
|
|
/// vector.
|
|
|
|
/// \returns An initialized 128-bit vector of [8 x i16] with all elements
|
|
|
|
/// containing the value provided in the operand.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi16(short __w) {
|
2018-05-31 05:08:27 +08:00
|
|
|
return _mm_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Initializes all values in a 128-bit vector of [16 x i8] with the
|
2016-04-09 04:45:48 +08:00
|
|
|
/// specified 8-bit value.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __b
|
|
|
|
/// An 8-bit value used to initialize the elements of the destination integer
|
|
|
|
/// vector.
|
|
|
|
/// \returns An initialized 128-bit vector of [16 x i8] with all elements
|
|
|
|
/// containing the value provided in the operand.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi8(char __b) {
|
|
|
|
return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b,
|
|
|
|
__b, __b, __b, __b, __b);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit integer vector, initialized in reverse order
|
2016-07-23 07:49:37 +08:00
|
|
|
/// with the specified 64-bit integral values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// This intrinsic does not correspond to a specific instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __q0
|
|
|
|
/// A 64-bit integral value used to initialize the lower 64 bits of the
|
|
|
|
/// result.
|
|
|
|
/// \param __q1
|
|
|
|
/// A 64-bit integral value used to initialize the upper 64 bits of the
|
|
|
|
/// result.
|
|
|
|
/// \returns An initialized 128-bit integer vector.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setr_epi64(__m64 __q0,
|
|
|
|
__m64 __q1) {
|
2018-05-31 09:51:07 +08:00
|
|
|
return _mm_set_epi64(__q1, __q0);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit integer vector, initialized in reverse order
|
2016-07-23 07:49:37 +08:00
|
|
|
/// with the specified 32-bit integral values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __i0
|
|
|
|
/// A 32-bit integral value used to initialize bits [31:0] of the result.
|
|
|
|
/// \param __i1
|
|
|
|
/// A 32-bit integral value used to initialize bits [63:32] of the result.
|
|
|
|
/// \param __i2
|
|
|
|
/// A 32-bit integral value used to initialize bits [95:64] of the result.
|
|
|
|
/// \param __i3
|
|
|
|
/// A 32-bit integral value used to initialize bits [127:96] of the result.
|
|
|
|
/// \returns An initialized 128-bit integer vector.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setr_epi32(int __i0, int __i1,
|
|
|
|
int __i2,
|
|
|
|
int __i3) {
|
2018-05-31 09:51:07 +08:00
|
|
|
return _mm_set_epi32(__i3, __i2, __i1, __i0);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit integer vector, initialized in reverse order
|
2016-07-23 07:49:37 +08:00
|
|
|
/// with the specified 16-bit integral values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __w0
|
|
|
|
/// A 16-bit integral value used to initialize bits [15:0] of the result.
|
|
|
|
/// \param __w1
|
|
|
|
/// A 16-bit integral value used to initialize bits [31:16] of the result.
|
|
|
|
/// \param __w2
|
|
|
|
/// A 16-bit integral value used to initialize bits [47:32] of the result.
|
|
|
|
/// \param __w3
|
|
|
|
/// A 16-bit integral value used to initialize bits [63:48] of the result.
|
|
|
|
/// \param __w4
|
|
|
|
/// A 16-bit integral value used to initialize bits [79:64] of the result.
|
|
|
|
/// \param __w5
|
|
|
|
/// A 16-bit integral value used to initialize bits [95:80] of the result.
|
|
|
|
/// \param __w6
|
|
|
|
/// A 16-bit integral value used to initialize bits [111:96] of the result.
|
|
|
|
/// \param __w7
|
|
|
|
/// A 16-bit integral value used to initialize bits [127:112] of the result.
|
|
|
|
/// \returns An initialized 128-bit integer vector.
|
2015-06-30 21:36:19 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
2022-04-22 09:18:41 +08:00
|
|
|
_mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4,
|
|
|
|
short __w5, short __w6, short __w7) {
|
2018-05-31 09:51:07 +08:00
|
|
|
return _mm_set_epi16(__w7, __w6, __w5, __w4, __w3, __w2, __w1, __w0);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit integer vector, initialized in reverse order
|
2016-07-23 07:49:37 +08:00
|
|
|
/// with the specified 8-bit integral values.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic is a utility function and does not correspond to a specific
|
|
|
|
/// instruction.
|
|
|
|
///
|
|
|
|
/// \param __b0
|
|
|
|
/// An 8-bit integral value used to initialize bits [7:0] of the result.
|
|
|
|
/// \param __b1
|
|
|
|
/// An 8-bit integral value used to initialize bits [15:8] of the result.
|
|
|
|
/// \param __b2
|
|
|
|
/// An 8-bit integral value used to initialize bits [23:16] of the result.
|
|
|
|
/// \param __b3
|
|
|
|
/// An 8-bit integral value used to initialize bits [31:24] of the result.
|
|
|
|
/// \param __b4
|
|
|
|
/// An 8-bit integral value used to initialize bits [39:32] of the result.
|
|
|
|
/// \param __b5
|
|
|
|
/// An 8-bit integral value used to initialize bits [47:40] of the result.
|
|
|
|
/// \param __b6
|
|
|
|
/// An 8-bit integral value used to initialize bits [55:48] of the result.
|
|
|
|
/// \param __b7
|
|
|
|
/// An 8-bit integral value used to initialize bits [63:56] of the result.
|
|
|
|
/// \param __b8
|
|
|
|
/// An 8-bit integral value used to initialize bits [71:64] of the result.
|
|
|
|
/// \param __b9
|
|
|
|
/// An 8-bit integral value used to initialize bits [79:72] of the result.
|
|
|
|
/// \param __b10
|
|
|
|
/// An 8-bit integral value used to initialize bits [87:80] of the result.
|
|
|
|
/// \param __b11
|
|
|
|
/// An 8-bit integral value used to initialize bits [95:88] of the result.
|
|
|
|
/// \param __b12
|
|
|
|
/// An 8-bit integral value used to initialize bits [103:96] of the result.
|
|
|
|
/// \param __b13
|
|
|
|
/// An 8-bit integral value used to initialize bits [111:104] of the result.
|
|
|
|
/// \param __b14
|
|
|
|
/// An 8-bit integral value used to initialize bits [119:112] of the result.
|
|
|
|
/// \param __b15
|
|
|
|
/// An 8-bit integral value used to initialize bits [127:120] of the result.
|
|
|
|
/// \returns An initialized 128-bit integer vector.
|
2015-06-30 21:36:19 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
2022-04-22 09:18:41 +08:00
|
|
|
_mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
|
|
|
char __b6, char __b7, char __b8, char __b9, char __b10,
|
|
|
|
char __b11, char __b12, char __b13, char __b14, char __b15) {
|
|
|
|
return _mm_set_epi8(__b15, __b14, __b13, __b12, __b11, __b10, __b9, __b8,
|
|
|
|
__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Creates a 128-bit integer vector initialized to zero.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \returns An initialized 128-bit integer vector with all elements set to
|
|
|
|
/// zero.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setzero_si128(void) {
|
|
|
|
return __extension__(__m128i)(__v2di){0LL, 0LL};
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores a 128-bit integer vector to a memory location aligned on a
|
2016-07-23 07:49:37 +08:00
|
|
|
/// 128-bit boundary.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to an aligned memory location that will receive the integer
|
|
|
|
/// values.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the values to be moved.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_si128(__m128i *__p,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
*__p = __b;
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores a 128-bit integer vector to an unaligned memory location.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to a memory location that will receive the integer values.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the values to be moved.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si128(__m128i_u *__p,
|
|
|
|
__m128i __b) {
|
2016-05-31 01:10:30 +08:00
|
|
|
struct __storeu_si128 {
|
2019-02-09 03:45:08 +08:00
|
|
|
__m128i_u __v;
|
2016-05-31 01:10:30 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
((struct __storeu_si128 *)__p)->__v = __b;
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-09-30 01:49:42 +08:00
|
|
|
/// Stores a 64-bit integer value from the low element of a 128-bit integer
|
|
|
|
/// vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
|
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to a 64-bit memory location. The address of the memory
|
2021-01-26 08:52:23 +08:00
|
|
|
/// location does not have to be aligned.
|
2018-09-30 01:49:42 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the value to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si64(void *__p,
|
|
|
|
__m128i __b) {
|
2018-09-30 01:49:42 +08:00
|
|
|
struct __storeu_si64 {
|
|
|
|
long long __v;
|
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
((struct __storeu_si64 *)__p)->__v = ((__v2di)__b)[0];
|
2018-09-30 01:49:42 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/// Stores a 32-bit integer value from the low element of a 128-bit integer
|
|
|
|
/// vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
|
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to a 32-bit memory location. The address of the memory
|
|
|
|
/// location does not have to be aligned.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the value to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si32(void *__p,
|
|
|
|
__m128i __b) {
|
2018-09-30 01:49:42 +08:00
|
|
|
struct __storeu_si32 {
|
|
|
|
int __v;
|
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
((struct __storeu_si32 *)__p)->__v = ((__v4si)__b)[0];
|
2018-09-30 01:49:42 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/// Stores a 16-bit integer value from the low element of a 128-bit integer
|
|
|
|
/// vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic does not correspond to a specific instruction.
|
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to a 16-bit memory location. The address of the memory
|
|
|
|
/// location does not have to be aligned.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector containing the value to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si16(void *__p,
|
|
|
|
__m128i __b) {
|
2018-09-30 01:49:42 +08:00
|
|
|
struct __storeu_si16 {
|
|
|
|
short __v;
|
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
((struct __storeu_si16 *)__p)->__v = ((__v8hi)__b)[0];
|
2018-09-30 01:49:42 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Moves bytes selected by the mask from the first operand to the
|
2016-07-23 07:49:37 +08:00
|
|
|
/// specified unaligned memory location. When a mask bit is 1, the
|
2017-05-15 11:25:04 +08:00
|
|
|
/// corresponding byte is written, otherwise it is not written.
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// To minimize caching, the data is flagged as non-temporal (unlikely to be
|
2017-05-15 11:25:04 +08:00
|
|
|
/// used again soon). Exception and trap behavior for elements not selected
|
|
|
|
/// for storage to memory are implementation dependent.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMASKMOVDQU / MASKMOVDQU </c>
|
|
|
|
/// instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __d
|
|
|
|
/// A 128-bit integer vector containing the values to be moved.
|
|
|
|
/// \param __n
|
|
|
|
/// A 128-bit integer vector containing the mask. The most significant bit of
|
|
|
|
/// each byte represents the mask bits.
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to an unaligned 128-bit memory location where the specified
|
|
|
|
/// values are moved.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_maskmoveu_si128(__m128i __d,
|
|
|
|
__m128i __n,
|
|
|
|
char *__p) {
|
2013-01-17 07:08:36 +08:00
|
|
|
__builtin_ia32_maskmovdqu((__v16qi)__d, (__v16qi)__n, __p);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores the lower 64 bits of a 128-bit integer vector of [2 x i64] to
|
2016-07-23 07:49:37 +08:00
|
|
|
/// a memory location.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVLPS / MOVLPS </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to a 64-bit memory location that will receive the lower 64 bits
|
|
|
|
/// of the integer vector parameter.
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector of [2 x i64]. The lower 64 bits contain the
|
|
|
|
/// value to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_epi64(__m128i_u *__p,
|
|
|
|
__m128i __a) {
|
2012-05-02 02:11:51 +08:00
|
|
|
struct __mm_storel_epi64_struct {
|
2013-01-17 07:08:36 +08:00
|
|
|
long long __u;
|
2012-05-02 02:11:51 +08:00
|
|
|
} __attribute__((__packed__, __may_alias__));
|
2022-04-22 09:18:41 +08:00
|
|
|
((struct __mm_storel_epi64_struct *)__p)->__u = __a[0];
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores a 128-bit floating point vector of [2 x double] to a 128-bit
|
2017-05-15 11:25:04 +08:00
|
|
|
/// aligned memory location.
|
|
|
|
///
|
|
|
|
/// To minimize caching, the data is flagged as non-temporal (unlikely to be
|
|
|
|
/// used again soon).
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to the 128-bit aligned memory location used to store the value.
|
|
|
|
/// \param __a
|
|
|
|
/// A vector of [2 x double] containing the 64-bit values to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_pd(double *__p,
|
|
|
|
__m128d __a) {
|
|
|
|
__builtin_nontemporal_store((__v2df)__a, (__v2df *)__p);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores a 128-bit integer vector to a 128-bit aligned memory location.
|
2017-05-15 11:25:04 +08:00
|
|
|
///
|
2016-07-23 07:49:37 +08:00
|
|
|
/// To minimize caching, the data is flagged as non-temporal (unlikely to be
|
|
|
|
/// used again soon).
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to the 128-bit aligned memory location used to store the value.
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the values to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_si128(__m128i *__p,
|
|
|
|
__m128i __a) {
|
|
|
|
__builtin_nontemporal_store((__v2di)__a, (__v2di *)__p);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores a 32-bit integer value in the specified memory location.
|
2017-05-15 11:25:04 +08:00
|
|
|
///
|
|
|
|
/// To minimize caching, the data is flagged as non-temporal (unlikely to be
|
2016-07-23 07:49:37 +08:00
|
|
|
/// used again soon).
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> MOVNTI </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to the 32-bit memory location used to store the value.
|
|
|
|
/// \param __a
|
|
|
|
/// A 32-bit integer containing the value to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void
|
|
|
|
__attribute__((__always_inline__, __nodebug__, __target__("sse2")))
|
|
|
|
_mm_stream_si32(int *__p, int __a) {
|
2013-01-17 07:08:36 +08:00
|
|
|
__builtin_ia32_movnti(__p, __a);
|
2008-12-26 07:48:58 +08:00
|
|
|
}
|
|
|
|
|
2013-09-24 07:38:39 +08:00
|
|
|
#ifdef __x86_64__
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Stores a 64-bit integer value in the specified memory location.
|
2017-05-15 11:25:04 +08:00
|
|
|
///
|
|
|
|
/// To minimize caching, the data is flagged as non-temporal (unlikely to be
|
2016-07-23 07:49:37 +08:00
|
|
|
/// used again soon).
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> MOVNTIQ </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to the 64-bit memory location used to store the value.
|
|
|
|
/// \param __a
|
|
|
|
/// A 64-bit integer containing the value to be stored.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ void
|
|
|
|
__attribute__((__always_inline__, __nodebug__, __target__("sse2")))
|
|
|
|
_mm_stream_si64(long long *__p, long long __a) {
|
2013-09-24 07:38:39 +08:00
|
|
|
__builtin_ia32_movnti64(__p, __a);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2016-09-15 05:19:43 +08:00
|
|
|
#if defined(__cplusplus)
|
|
|
|
extern "C" {
|
|
|
|
#endif
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// The cache line containing \a __p is flushed and invalidated from all
|
2016-07-23 07:49:37 +08:00
|
|
|
/// caches in the coherency domain.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> CLFLUSH </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __p
|
|
|
|
/// A pointer to the memory location used to identify the cache line to be
|
|
|
|
/// flushed.
|
2022-04-22 09:18:41 +08:00
|
|
|
void _mm_clflush(void const *__p);
|
2008-12-26 07:48:58 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Forces strong memory ordering (serialization) between load
|
2016-07-23 07:49:37 +08:00
|
|
|
/// instructions preceding this instruction and load instructions following
|
|
|
|
/// this instruction, ensuring the system completes all previous loads before
|
|
|
|
/// executing subsequent loads.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> LFENCE </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
2016-09-15 05:19:43 +08:00
|
|
|
void _mm_lfence(void);
|
2008-12-26 07:48:58 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Forces strong memory ordering (serialization) between load and store
|
2016-07-23 07:49:37 +08:00
|
|
|
/// instructions preceding this instruction and load and store instructions
|
|
|
|
/// following this instruction, ensuring that the system completes all
|
|
|
|
/// previous memory accesses before executing subsequent memory accesses.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> MFENCE </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
2016-09-15 05:19:43 +08:00
|
|
|
void _mm_mfence(void);
|
|
|
|
|
|
|
|
#if defined(__cplusplus)
|
|
|
|
} // extern "C"
|
|
|
|
#endif
|
2008-12-26 07:48:58 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts 16-bit signed integers from both 128-bit integer vector
|
2016-07-23 07:49:37 +08:00
|
|
|
/// operands into 8-bit signed integers, and packs the results into the
|
|
|
|
/// destination. Positive values greater than 0x7F are saturated to 0x7F.
|
|
|
|
/// Negative values less than 0x80 are saturated to 0x80.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPACKSSWB / PACKSSWB </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
|
|
|
|
/// a signed integer and is converted to a 8-bit signed integer with
|
|
|
|
/// saturation. Values greater than 0x7F are saturated to 0x7F. Values less
|
|
|
|
/// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
|
|
|
|
/// written to the lower 64 bits of the result.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
|
|
|
|
/// a signed integer and is converted to a 8-bit signed integer with
|
|
|
|
/// saturation. Values greater than 0x7F are saturated to 0x7F. Values less
|
|
|
|
/// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
|
|
|
|
/// written to the higher 64 bits of the result.
|
|
|
|
/// \returns A 128-bit vector of [16 x i8] containing the converted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts 32-bit signed integers from both 128-bit integer vector
|
2016-07-23 07:49:37 +08:00
|
|
|
/// operands into 16-bit signed integers, and packs the results into the
|
|
|
|
/// destination. Positive values greater than 0x7FFF are saturated to 0x7FFF.
|
|
|
|
/// Negative values less than 0x8000 are saturated to 0x8000.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPACKSSDW / PACKSSDW </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
|
|
|
|
/// a signed integer and is converted to a 16-bit signed integer with
|
|
|
|
/// saturation. Values greater than 0x7FFF are saturated to 0x7FFF. Values
|
|
|
|
/// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
|
|
|
|
/// are written to the lower 64 bits of the result.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
|
|
|
|
/// a signed integer and is converted to a 16-bit signed integer with
|
|
|
|
/// saturation. Values greater than 0x7FFF are saturated to 0x7FFF. Values
|
|
|
|
/// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
|
|
|
|
/// are written to the higher 64 bits of the result.
|
|
|
|
/// \returns A 128-bit vector of [8 x i16] containing the converted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi32(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Converts 16-bit signed integers from both 128-bit integer vector
|
2016-07-23 07:49:37 +08:00
|
|
|
/// operands into 8-bit unsigned integers, and packs the results into the
|
|
|
|
/// destination. Values greater than 0xFF are saturated to 0xFF. Values less
|
|
|
|
/// than 0x00 are saturated to 0x00.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPACKUSWB / PACKUSWB </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
|
|
|
|
/// a signed integer and is converted to an 8-bit unsigned integer with
|
|
|
|
/// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
|
|
|
|
/// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
|
|
|
|
/// written to the lower 64 bits of the result.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
|
|
|
|
/// a signed integer and is converted to an 8-bit unsigned integer with
|
|
|
|
/// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
|
|
|
|
/// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
|
|
|
|
/// written to the higher 64 bits of the result.
|
|
|
|
/// \returns A 128-bit vector of [16 x i8] containing the converted values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Extracts 16 bits from a 128-bit integer vector of [8 x i16], using
|
2016-07-23 07:49:37 +08:00
|
|
|
/// the immediate-value parameter as a selector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \param __imm
|
2017-01-13 09:14:08 +08:00
|
|
|
/// An immediate value. Bits [2:0] selects values from \a __a to be assigned
|
2016-12-27 08:49:38 +08:00
|
|
|
/// to bits[15:0] of the result. \n
|
|
|
|
/// 000: assign values from bits [15:0] of \a __a. \n
|
|
|
|
/// 001: assign values from bits [31:16] of \a __a. \n
|
|
|
|
/// 010: assign values from bits [47:32] of \a __a. \n
|
|
|
|
/// 011: assign values from bits [63:48] of \a __a. \n
|
|
|
|
/// 100: assign values from bits [79:64] of \a __a. \n
|
|
|
|
/// 101: assign values from bits [95:80] of \a __a. \n
|
|
|
|
/// 110: assign values from bits [111:96] of \a __a. \n
|
2016-12-09 06:10:51 +08:00
|
|
|
/// 111: assign values from bits [127:112] of \a __a.
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \returns An integer, whose lower 16 bits are selected from the 128-bit
|
|
|
|
/// integer vector parameter and the remaining bits are assigned zeros.
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_extract_epi16(a, imm) \
|
|
|
|
((int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a), \
|
2021-08-14 00:22:43 +08:00
|
|
|
(int)(imm)))
|
2008-12-26 08:45:50 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit integer vector by first making a copy of the
|
2016-07-23 07:49:37 +08:00
|
|
|
/// 128-bit integer vector parameter, and then inserting the lower 16 bits
|
|
|
|
/// of an integer parameter into an offset specified by the immediate-value
|
|
|
|
/// parameter.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector of [8 x i16]. This vector is copied to the
|
|
|
|
/// result and then one of the eight elements in the result is replaced by
|
2016-12-09 06:10:51 +08:00
|
|
|
/// the lower 16 bits of \a __b.
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \param __b
|
|
|
|
/// An integer. The lower 16 bits of this parameter are written to the
|
2016-12-09 06:10:51 +08:00
|
|
|
/// result beginning at an offset specified by \a __imm.
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \param __imm
|
|
|
|
/// An immediate value specifying the bit offset in the result at which the
|
2016-12-09 06:10:51 +08:00
|
|
|
/// lower 16 bits of \a __b are written.
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the constructed values.
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_insert_epi16(a, b, imm) \
|
|
|
|
((__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b), \
|
2021-08-14 00:22:43 +08:00
|
|
|
(int)(imm)))
|
2008-12-26 08:45:50 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Copies the values of the most significant bits from each 8-bit
|
2016-07-23 07:49:37 +08:00
|
|
|
/// element in a 128-bit integer vector of [16 x i8] to create a 16-bit mask
|
|
|
|
/// value, zero-extends the value, and writes it to the destination.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPMOVMSKB / PMOVMSKB </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector containing the values with bits to be extracted.
|
2016-12-09 06:10:51 +08:00
|
|
|
/// \returns The most significant bits from each 8-bit element in \a __a,
|
|
|
|
/// written to bits [15:0]. The other bits are assigned zeros.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return __builtin_ia32_pmovmskb128((__v16qi)__a);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit integer vector by shuffling four 32-bit
|
2016-07-23 07:49:37 +08:00
|
|
|
/// elements of a 128-bit integer vector parameter, using the immediate-value
|
|
|
|
/// parameter as a specifier.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// \code
|
|
|
|
/// __m128i _mm_shuffle_epi32(__m128i a, const int imm);
|
|
|
|
/// \endcode
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param a
|
|
|
|
/// A 128-bit integer vector containing the values to be copied.
|
|
|
|
/// \param imm
|
|
|
|
/// An immediate value containing an 8-bit value specifying which elements to
|
|
|
|
/// copy from a. The destinations within the 128-bit destination are assigned
|
2016-12-27 08:49:38 +08:00
|
|
|
/// values as follows: \n
|
|
|
|
/// Bits [1:0] are used to assign values to bits [31:0] of the result. \n
|
|
|
|
/// Bits [3:2] are used to assign values to bits [63:32] of the result. \n
|
|
|
|
/// Bits [5:4] are used to assign values to bits [95:64] of the result. \n
|
|
|
|
/// Bits [7:6] are used to assign values to bits [127:96] of the result. \n
|
|
|
|
/// Bit value assignments: \n
|
|
|
|
/// 00: assign values from bits [31:0] of \a a. \n
|
|
|
|
/// 01: assign values from bits [63:32] of \a a. \n
|
|
|
|
/// 10: assign values from bits [95:64] of \a a. \n
|
|
|
|
/// 11: assign values from bits [127:96] of \a a.
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_shuffle_epi32(a, imm) \
|
2021-08-14 00:22:43 +08:00
|
|
|
((__m128i)__builtin_ia32_pshufd((__v4si)(__m128i)(a), (int)(imm)))
|
2011-04-26 04:42:40 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit integer vector by shuffling four lower 16-bit
|
2016-07-23 07:49:37 +08:00
|
|
|
/// elements of a 128-bit integer vector of [8 x i16], using the immediate
|
|
|
|
/// value parameter as a specifier.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// \code
|
|
|
|
/// __m128i _mm_shufflelo_epi16(__m128i a, const int imm);
|
|
|
|
/// \endcode
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param a
|
|
|
|
/// A 128-bit integer vector of [8 x i16]. Bits [127:64] are copied to bits
|
|
|
|
/// [127:64] of the result.
|
|
|
|
/// \param imm
|
2016-12-27 08:49:38 +08:00
|
|
|
/// An 8-bit immediate value specifying which elements to copy from \a a. \n
|
|
|
|
/// Bits[1:0] are used to assign values to bits [15:0] of the result. \n
|
|
|
|
/// Bits[3:2] are used to assign values to bits [31:16] of the result. \n
|
|
|
|
/// Bits[5:4] are used to assign values to bits [47:32] of the result. \n
|
|
|
|
/// Bits[7:6] are used to assign values to bits [63:48] of the result. \n
|
|
|
|
/// Bit value assignments: \n
|
|
|
|
/// 00: assign values from bits [15:0] of \a a. \n
|
|
|
|
/// 01: assign values from bits [31:16] of \a a. \n
|
|
|
|
/// 10: assign values from bits [47:32] of \a a. \n
|
|
|
|
/// 11: assign values from bits [63:48] of \a a. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_shufflelo_epi16(a, imm) \
|
2021-08-14 00:22:43 +08:00
|
|
|
((__m128i)__builtin_ia32_pshuflw((__v8hi)(__m128i)(a), (int)(imm)))
|
2011-04-26 04:42:40 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Constructs a 128-bit integer vector by shuffling four upper 16-bit
|
2016-07-23 07:49:37 +08:00
|
|
|
/// elements of a 128-bit integer vector of [8 x i16], using the immediate
|
|
|
|
/// value parameter as a specifier.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// \code
|
|
|
|
/// __m128i _mm_shufflehi_epi16(__m128i a, const int imm);
|
|
|
|
/// \endcode
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPSHUFHW / PSHUFHW </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param a
|
|
|
|
/// A 128-bit integer vector of [8 x i16]. Bits [63:0] are copied to bits
|
|
|
|
/// [63:0] of the result.
|
|
|
|
/// \param imm
|
2016-12-27 08:49:38 +08:00
|
|
|
/// An 8-bit immediate value specifying which elements to copy from \a a. \n
|
|
|
|
/// Bits[1:0] are used to assign values to bits [79:64] of the result. \n
|
|
|
|
/// Bits[3:2] are used to assign values to bits [95:80] of the result. \n
|
|
|
|
/// Bits[5:4] are used to assign values to bits [111:96] of the result. \n
|
|
|
|
/// Bits[7:6] are used to assign values to bits [127:112] of the result. \n
|
|
|
|
/// Bit value assignments: \n
|
|
|
|
/// 00: assign values from bits [79:64] of \a a. \n
|
|
|
|
/// 01: assign values from bits [95:80] of \a a. \n
|
|
|
|
/// 10: assign values from bits [111:96] of \a a. \n
|
|
|
|
/// 11: assign values from bits [127:112] of \a a. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_shufflehi_epi16(a, imm) \
|
2021-08-14 00:22:43 +08:00
|
|
|
((__m128i)__builtin_ia32_pshufhw((__v8hi)(__m128i)(a), (int)(imm)))
|
2008-12-26 08:45:50 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Unpacks the high-order (index 8-15) values from two 128-bit vectors
|
2016-07-23 07:49:37 +08:00
|
|
|
/// of [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPUNPCKHBW / PUNPCKHBW </c>
|
|
|
|
/// instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [16 x i8].
|
2016-12-27 08:49:38 +08:00
|
|
|
/// Bits [71:64] are written to bits [7:0] of the result. \n
|
|
|
|
/// Bits [79:72] are written to bits [23:16] of the result. \n
|
|
|
|
/// Bits [87:80] are written to bits [39:32] of the result. \n
|
|
|
|
/// Bits [95:88] are written to bits [55:48] of the result. \n
|
|
|
|
/// Bits [103:96] are written to bits [71:64] of the result. \n
|
|
|
|
/// Bits [111:104] are written to bits [87:80] of the result. \n
|
|
|
|
/// Bits [119:112] are written to bits [103:96] of the result. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [127:120] are written to bits [119:112] of the result.
|
|
|
|
/// \param __b
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [16 x i8]. \n
|
|
|
|
/// Bits [71:64] are written to bits [15:8] of the result. \n
|
|
|
|
/// Bits [79:72] are written to bits [31:24] of the result. \n
|
|
|
|
/// Bits [87:80] are written to bits [47:40] of the result. \n
|
|
|
|
/// Bits [95:88] are written to bits [63:56] of the result. \n
|
|
|
|
/// Bits [103:96] are written to bits [79:72] of the result. \n
|
|
|
|
/// Bits [111:104] are written to bits [95:88] of the result. \n
|
|
|
|
/// Bits [119:112] are written to bits [111:104] of the result. \n
|
|
|
|
/// Bits [127:120] are written to bits [127:120] of the result.
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a,
|
|
|
|
__m128i __b) {
|
|
|
|
return (__m128i)__builtin_shufflevector(
|
|
|
|
(__v16qi)__a, (__v16qi)__b, 8, 16 + 8, 9, 16 + 9, 10, 16 + 10, 11,
|
|
|
|
16 + 11, 12, 16 + 12, 13, 16 + 13, 14, 16 + 14, 15, 16 + 15);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Unpacks the high-order (index 4-7) values from two 128-bit vectors of
|
2016-07-23 07:49:37 +08:00
|
|
|
/// [8 x i16] and interleaves them into a 128-bit vector of [8 x i16].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPUNPCKHWD / PUNPCKHWD </c>
|
|
|
|
/// instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [8 x i16].
|
2016-12-27 08:49:38 +08:00
|
|
|
/// Bits [79:64] are written to bits [15:0] of the result. \n
|
|
|
|
/// Bits [95:80] are written to bits [47:32] of the result. \n
|
|
|
|
/// Bits [111:96] are written to bits [79:64] of the result. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [127:112] are written to bits [111:96] of the result.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [8 x i16].
|
2016-12-27 08:49:38 +08:00
|
|
|
/// Bits [79:64] are written to bits [31:16] of the result. \n
|
|
|
|
/// Bits [95:80] are written to bits [63:48] of the result. \n
|
|
|
|
/// Bits [111:96] are written to bits [95:80] of the result. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [127:112] are written to bits [127:112] of the result.
|
|
|
|
/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
|
|
|
return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8 + 4, 5,
|
|
|
|
8 + 5, 6, 8 + 6, 7, 8 + 7);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Unpacks the high-order (index 2,3) values from two 128-bit vectors of
|
2016-07-23 07:49:37 +08:00
|
|
|
/// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPUNPCKHDQ / PUNPCKHDQ </c>
|
|
|
|
/// instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [4 x i32]. \n
|
|
|
|
/// Bits [95:64] are written to bits [31:0] of the destination. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [127:96] are written to bits [95:64] of the destination.
|
|
|
|
/// \param __b
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [4 x i32]. \n
|
|
|
|
/// Bits [95:64] are written to bits [64:32] of the destination. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [127:96] are written to bits [127:96] of the destination.
|
|
|
|
/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a,
|
|
|
|
__m128i __b) {
|
|
|
|
return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4 + 2, 3,
|
|
|
|
4 + 3);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Unpacks the high-order 64-bit elements from two 128-bit vectors of
|
2018-01-03 04:39:29 +08:00
|
|
|
/// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPUNPCKHQDQ / PUNPCKHQDQ </c>
|
|
|
|
/// instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [2 x i64]. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [127:64] are written to bits [63:0] of the destination.
|
|
|
|
/// \param __b
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [2 x i64]. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [127:64] are written to bits [127:64] of the destination.
|
|
|
|
/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a,
|
|
|
|
__m128i __b) {
|
|
|
|
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2 + 1);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Unpacks the low-order (index 0-7) values from two 128-bit vectors of
|
2016-07-23 07:49:37 +08:00
|
|
|
/// [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPUNPCKLBW / PUNPCKLBW </c>
|
|
|
|
/// instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [16 x i8]. \n
|
|
|
|
/// Bits [7:0] are written to bits [7:0] of the result. \n
|
|
|
|
/// Bits [15:8] are written to bits [23:16] of the result. \n
|
|
|
|
/// Bits [23:16] are written to bits [39:32] of the result. \n
|
|
|
|
/// Bits [31:24] are written to bits [55:48] of the result. \n
|
|
|
|
/// Bits [39:32] are written to bits [71:64] of the result. \n
|
|
|
|
/// Bits [47:40] are written to bits [87:80] of the result. \n
|
|
|
|
/// Bits [55:48] are written to bits [103:96] of the result. \n
|
|
|
|
/// Bits [63:56] are written to bits [119:112] of the result.
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [16 x i8].
|
2016-12-27 08:49:38 +08:00
|
|
|
/// Bits [7:0] are written to bits [15:8] of the result. \n
|
|
|
|
/// Bits [15:8] are written to bits [31:24] of the result. \n
|
|
|
|
/// Bits [23:16] are written to bits [47:40] of the result. \n
|
|
|
|
/// Bits [31:24] are written to bits [63:56] of the result. \n
|
|
|
|
/// Bits [39:32] are written to bits [79:72] of the result. \n
|
|
|
|
/// Bits [47:40] are written to bits [95:88] of the result. \n
|
|
|
|
/// Bits [55:48] are written to bits [111:104] of the result. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [63:56] are written to bits [127:120] of the result.
|
|
|
|
/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a,
|
|
|
|
__m128i __b) {
|
|
|
|
return (__m128i)__builtin_shufflevector(
|
|
|
|
(__v16qi)__a, (__v16qi)__b, 0, 16 + 0, 1, 16 + 1, 2, 16 + 2, 3, 16 + 3, 4,
|
|
|
|
16 + 4, 5, 16 + 5, 6, 16 + 6, 7, 16 + 7);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Unpacks the low-order (index 0-3) values from each of the two 128-bit
|
2016-07-23 07:49:37 +08:00
|
|
|
/// vectors of [8 x i16] and interleaves them into a 128-bit vector of
|
|
|
|
/// [8 x i16].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPUNPCKLWD / PUNPCKLWD </c>
|
|
|
|
/// instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit vector of [8 x i16].
|
2016-12-27 08:49:38 +08:00
|
|
|
/// Bits [15:0] are written to bits [15:0] of the result. \n
|
|
|
|
/// Bits [31:16] are written to bits [47:32] of the result. \n
|
|
|
|
/// Bits [47:32] are written to bits [79:64] of the result. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [63:48] are written to bits [111:96] of the result.
|
|
|
|
/// \param __b
|
|
|
|
/// A 128-bit vector of [8 x i16].
|
2016-12-27 08:49:38 +08:00
|
|
|
/// Bits [15:0] are written to bits [31:16] of the result. \n
|
|
|
|
/// Bits [31:16] are written to bits [63:48] of the result. \n
|
|
|
|
/// Bits [47:32] are written to bits [95:80] of the result. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [63:48] are written to bits [127:112] of the result.
|
|
|
|
/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a,
|
|
|
|
__m128i __b) {
|
|
|
|
return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8 + 0, 1,
|
|
|
|
8 + 1, 2, 8 + 2, 3, 8 + 3);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Unpacks the low-order (index 0,1) values from two 128-bit vectors of
|
2016-07-23 07:49:37 +08:00
|
|
|
/// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPUNPCKLDQ / PUNPCKLDQ </c>
|
|
|
|
/// instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [4 x i32]. \n
|
|
|
|
/// Bits [31:0] are written to bits [31:0] of the destination. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [63:32] are written to bits [95:64] of the destination.
|
|
|
|
/// \param __b
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [4 x i32]. \n
|
|
|
|
/// Bits [31:0] are written to bits [64:32] of the destination. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// Bits [63:32] are written to bits [127:96] of the destination.
|
|
|
|
/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a,
|
|
|
|
__m128i __b) {
|
|
|
|
return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4 + 0, 1,
|
|
|
|
4 + 1);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Unpacks the low-order 64-bit elements from two 128-bit vectors of
|
2016-07-23 07:49:37 +08:00
|
|
|
/// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-27 08:49:38 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VPUNPCKLQDQ / PUNPCKLQDQ </c>
|
|
|
|
/// instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [2 x i64]. \n
|
|
|
|
/// Bits [63:0] are written to bits [63:0] of the destination. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \param __b
|
2016-12-27 08:49:38 +08:00
|
|
|
/// A 128-bit vector of [2 x i64]. \n
|
|
|
|
/// Bits [63:0] are written to bits [127:64] of the destination. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi64(__m128i __a,
|
|
|
|
__m128i __b) {
|
|
|
|
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2 + 0);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Returns the lower 64 bits of a 128-bit integer vector as a 64-bit
|
2016-10-21 01:59:15 +08:00
|
|
|
/// integer.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// This intrinsic corresponds to the <c> MOVDQ2Q </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector operand. The lower 64 bits are moved to the
|
|
|
|
/// destination.
|
|
|
|
/// \returns A 64-bit integer containing the lower 64 bits of the parameter.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_movepi64_pi64(__m128i __a) {
|
2013-01-17 07:08:36 +08:00
|
|
|
return (__m64)__a[0];
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Moves the 64-bit operand to a 128-bit integer vector, zeroing the
|
2016-07-23 07:49:37 +08:00
|
|
|
/// upper bits.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2018-01-03 04:39:29 +08:00
|
|
|
/// This intrinsic corresponds to the <c> MOVD+VMOVQ </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 64-bit value.
|
|
|
|
/// \returns A 128-bit integer vector. The lower 64 bits contain the value from
|
|
|
|
/// the operand. The upper 64 bits are assigned zeros.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_movpi64_epi64(__m64 __a) {
|
|
|
|
return __extension__(__m128i)(__v2di){(long long)__a, 0};
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Moves the lower 64 bits of a 128-bit integer vector to a 128-bit
|
2016-07-23 07:49:37 +08:00
|
|
|
/// integer vector, zeroing the upper bits.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector operand. The lower 64 bits are moved to the
|
|
|
|
/// destination.
|
|
|
|
/// \returns A 128-bit integer vector. The lower 64 bits contain the value from
|
|
|
|
/// the operand. The upper 64 bits are assigned zeros.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_move_epi64(__m128i __a) {
|
2018-05-31 05:08:27 +08:00
|
|
|
return __builtin_shufflevector((__v2di)__a, _mm_setzero_si128(), 0, 2);
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Unpacks the high-order 64-bit elements from two 128-bit vectors of
|
2018-01-03 04:39:29 +08:00
|
|
|
/// [2 x double] and interleaves them into a 128-bit vector of [2 x
|
2016-07-23 07:49:37 +08:00
|
|
|
/// double].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> VUNPCKHPD / UNPCKHPD </c> instruction.
|
2016-07-23 07:49:37 +08:00
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///
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/// \param __a
|
2016-12-27 08:49:38 +08:00
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/// A 128-bit vector of [2 x double]. \n
|
2016-07-23 07:49:37 +08:00
|
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/// Bits [127:64] are written to bits [63:0] of the destination.
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|
/// \param __b
|
2016-12-27 08:49:38 +08:00
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/// A 128-bit vector of [2 x double]. \n
|
2016-07-23 07:49:37 +08:00
|
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|
/// Bits [127:64] are written to bits [127:64] of the destination.
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|
/// \returns A 128-bit vector of [2 x double] containing the interleaved values.
|
2022-04-22 09:18:41 +08:00
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|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_unpackhi_pd(__m128d __a,
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|
|
|
__m128d __b) {
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return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2 + 1);
|
2008-12-26 08:45:50 +08:00
|
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|
}
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|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Unpacks the low-order 64-bit elements from two 128-bit vectors
|
2016-07-23 07:49:37 +08:00
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/// of [2 x double] and interleaves them into a 128-bit vector of [2 x
|
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|
/// double].
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///
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/// \headerfile <x86intrin.h>
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///
|
2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
|
2016-07-23 07:49:37 +08:00
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///
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/// \param __a
|
2016-12-27 08:49:38 +08:00
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/// A 128-bit vector of [2 x double]. \n
|
2016-07-23 07:49:37 +08:00
|
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|
/// Bits [63:0] are written to bits [63:0] of the destination.
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|
|
|
/// \param __b
|
2016-12-27 08:49:38 +08:00
|
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|
/// A 128-bit vector of [2 x double]. \n
|
2016-07-23 07:49:37 +08:00
|
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/// Bits [63:0] are written to bits [127:64] of the destination.
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/// \returns A 128-bit vector of [2 x double] containing the interleaved values.
|
2022-04-22 09:18:41 +08:00
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_unpacklo_pd(__m128d __a,
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|
|
__m128d __b) {
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|
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2 + 0);
|
2008-12-26 08:45:50 +08:00
|
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|
}
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|
2018-05-09 09:00:01 +08:00
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/// Extracts the sign bits of the double-precision values in the 128-bit
|
2016-07-23 07:49:37 +08:00
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/// vector of [2 x double], zero-extends the value, and writes it to the
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/// low-order bits of the destination.
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///
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/// \headerfile <x86intrin.h>
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///
|
2016-12-10 02:35:50 +08:00
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/// This intrinsic corresponds to the <c> VMOVMSKPD / MOVMSKPD </c> instruction.
|
2016-07-23 07:49:37 +08:00
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing the values with sign bits to
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/// be extracted.
|
2016-12-09 06:10:51 +08:00
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/// \returns The sign bits from each of the double-precision elements in \a __a,
|
2016-07-23 07:49:37 +08:00
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|
/// written to bits [1:0]. The remaining bits are assigned values of zero.
|
2022-04-22 09:18:41 +08:00
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|
|
static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_pd(__m128d __a) {
|
2016-05-16 14:38:42 +08:00
|
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|
return __builtin_ia32_movmskpd((__v2df)__a);
|
2008-12-26 08:45:50 +08:00
|
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|
}
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|
2018-05-09 09:00:01 +08:00
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|
/// Constructs a 128-bit floating-point vector of [2 x double] from two
|
2016-07-23 07:49:37 +08:00
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|
/// 128-bit vector parameters of [2 x double], using the immediate-value
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/// parameter as a specifier.
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///
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|
/// \headerfile <x86intrin.h>
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///
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/// \code
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|
/// __m128d _mm_shuffle_pd(__m128d a, __m128d b, const int i);
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/// \endcode
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///
|
2016-12-10 02:35:50 +08:00
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|
/// This intrinsic corresponds to the <c> VSHUFPD / SHUFPD </c> instruction.
|
2016-07-23 07:49:37 +08:00
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///
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|
/// \param a
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|
/// A 128-bit vector of [2 x double].
|
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|
|
/// \param b
|
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|
|
/// A 128-bit vector of [2 x double].
|
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|
|
/// \param i
|
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|
|
/// An 8-bit immediate value. The least significant two bits specify which
|
2018-01-03 04:39:29 +08:00
|
|
|
/// elements to copy from \a a and \a b: \n
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|
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|
/// Bit[0] = 0: lower element of \a a copied to lower element of result. \n
|
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|
|
/// Bit[0] = 1: upper element of \a a copied to lower element of result. \n
|
2016-12-27 08:49:38 +08:00
|
|
|
/// Bit[1] = 0: lower element of \a b copied to upper element of result. \n
|
|
|
|
/// Bit[1] = 1: upper element of \a b copied to upper element of result. \n
|
2016-07-23 07:49:37 +08:00
|
|
|
/// \returns A 128-bit vector of [2 x double] containing the shuffled values.
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _mm_shuffle_pd(a, b, i) \
|
|
|
|
((__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \
|
2021-08-14 00:22:43 +08:00
|
|
|
(int)(i)))
|
2008-12-26 08:45:50 +08:00
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
|
2016-07-23 07:49:37 +08:00
|
|
|
/// floating-point vector of [4 x float].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic has no corresponding instruction.
|
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit floating-point vector of [2 x double].
|
|
|
|
/// \returns A 128-bit floating-point vector of [4 x float] containing the same
|
|
|
|
/// bitwise pattern as the parameter.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_castpd_ps(__m128d __a) {
|
2013-04-20 01:00:14 +08:00
|
|
|
return (__m128)__a;
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
|
2016-07-23 07:49:37 +08:00
|
|
|
/// integer vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic has no corresponding instruction.
|
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit floating-point vector of [2 x double].
|
|
|
|
/// \returns A 128-bit integer vector containing the same bitwise pattern as the
|
|
|
|
/// parameter.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_castpd_si128(__m128d __a) {
|
2013-04-20 01:00:14 +08:00
|
|
|
return (__m128i)__a;
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Casts a 128-bit floating-point vector of [4 x float] into a 128-bit
|
2016-07-23 07:49:37 +08:00
|
|
|
/// floating-point vector of [2 x double].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic has no corresponding instruction.
|
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit floating-point vector of [4 x float].
|
|
|
|
/// \returns A 128-bit floating-point vector of [2 x double] containing the same
|
|
|
|
/// bitwise pattern as the parameter.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castps_pd(__m128 __a) {
|
2013-04-20 01:00:14 +08:00
|
|
|
return (__m128d)__a;
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Casts a 128-bit floating-point vector of [4 x float] into a 128-bit
|
2016-07-23 07:49:37 +08:00
|
|
|
/// integer vector.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic has no corresponding instruction.
|
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit floating-point vector of [4 x float].
|
|
|
|
/// \returns A 128-bit integer vector containing the same bitwise pattern as the
|
|
|
|
/// parameter.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_castps_si128(__m128 __a) {
|
2013-04-20 01:00:14 +08:00
|
|
|
return (__m128i)__a;
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Casts a 128-bit integer vector into a 128-bit floating-point vector
|
2016-07-23 07:49:37 +08:00
|
|
|
/// of [4 x float].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic has no corresponding instruction.
|
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit floating-point vector of [4 x float] containing the same
|
|
|
|
/// bitwise pattern as the parameter.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_castsi128_ps(__m128i __a) {
|
2013-04-20 01:00:14 +08:00
|
|
|
return (__m128)__a;
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Casts a 128-bit integer vector into a 128-bit floating-point vector
|
2016-07-23 07:49:37 +08:00
|
|
|
/// of [2 x double].
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
|
|
|
/// This intrinsic has no corresponding instruction.
|
|
|
|
///
|
|
|
|
/// \param __a
|
|
|
|
/// A 128-bit integer vector.
|
|
|
|
/// \returns A 128-bit floating-point vector of [2 x double] containing the same
|
|
|
|
/// bitwise pattern as the parameter.
|
2022-04-22 09:18:41 +08:00
|
|
|
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castsi128_pd(__m128i __a) {
|
2013-04-20 01:00:14 +08:00
|
|
|
return (__m128d)__a;
|
2008-12-26 08:45:50 +08:00
|
|
|
}
|
|
|
|
|
2016-11-18 07:02:00 +08:00
|
|
|
#if defined(__cplusplus)
|
|
|
|
extern "C" {
|
|
|
|
#endif
|
|
|
|
|
2018-05-09 09:00:01 +08:00
|
|
|
/// Indicates that a spin loop is being executed for the purposes of
|
2016-07-23 07:49:37 +08:00
|
|
|
/// optimizing power consumption during the loop.
|
|
|
|
///
|
|
|
|
/// \headerfile <x86intrin.h>
|
|
|
|
///
|
2016-12-10 02:35:50 +08:00
|
|
|
/// This intrinsic corresponds to the <c> PAUSE </c> instruction.
|
2016-07-23 07:49:37 +08:00
|
|
|
///
|
2016-09-15 05:19:43 +08:00
|
|
|
void _mm_pause(void);
|
2008-12-26 08:49:43 +08:00
|
|
|
|
2016-11-18 07:02:00 +08:00
|
|
|
#if defined(__cplusplus)
|
|
|
|
} // extern "C"
|
|
|
|
#endif
|
2015-06-30 21:36:19 +08:00
|
|
|
#undef __DEFAULT_FN_ATTRS
|
2018-06-05 11:12:14 +08:00
|
|
|
#undef __DEFAULT_FN_ATTRS_MMX
|
2015-06-17 15:09:20 +08:00
|
|
|
|
2009-01-21 09:49:39 +08:00
|
|
|
#define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
|
2008-12-26 08:49:43 +08:00
|
|
|
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _MM_DENORMALS_ZERO_ON (0x0040U)
|
|
|
|
#define _MM_DENORMALS_ZERO_OFF (0x0000U)
|
2017-02-26 19:58:15 +08:00
|
|
|
|
2020-04-03 21:43:38 +08:00
|
|
|
#define _MM_DENORMALS_ZERO_MASK (0x0040U)
|
2017-02-26 19:58:15 +08:00
|
|
|
|
|
|
|
#define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
|
2022-04-22 09:18:41 +08:00
|
|
|
#define _MM_SET_DENORMALS_ZERO_MODE(x) \
|
|
|
|
(_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x)))
|
2017-02-26 19:58:15 +08:00
|
|
|
|
2008-12-24 09:45:22 +08:00
|
|
|
#endif /* __EMMINTRIN_H */
|