forked from OSchip/llvm-project
60 lines
3.4 KiB
LLVM
60 lines
3.4 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -mtriple=riscv32-- -atomic-expand %s | FileCheck %s
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define float @test_atomicrmw_fadd_f32(float* %ptr, float %value) {
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; CHECK-LABEL: @test_atomicrmw_fadd_f32(
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; CHECK-NEXT: [[TMP1:%.*]] = alloca float, align 4
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; CHECK-NEXT: [[TMP2:%.*]] = load float, float* [[PTR:%.*]], align 4
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
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; CHECK-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VALUE:%.*]]
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[PTR]] to i8*
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast float* [[TMP1]] to i8*
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; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]])
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; CHECK-NEXT: store float [[LOADED]], float* [[TMP1]], align 4
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; CHECK-NEXT: [[TMP5:%.*]] = bitcast float [[NEW]] to i32
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; CHECK-NEXT: [[TMP6:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(i8* [[TMP3]], i8* [[TMP4]], i32 [[TMP5]], i32 5, i32 5)
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; CHECK-NEXT: [[TMP7:%.*]] = load float, float* [[TMP1]], align 4
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; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]])
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; CHECK-NEXT: [[TMP8:%.*]] = insertvalue { float, i1 } undef, float [[TMP7]], 0
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; CHECK-NEXT: [[TMP9:%.*]] = insertvalue { float, i1 } [[TMP8]], i1 [[TMP6]], 1
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; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { float, i1 } [[TMP9]], 1
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; CHECK-NEXT: [[NEWLOADED]] = extractvalue { float, i1 } [[TMP9]], 0
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; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: ret float [[NEWLOADED]]
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;
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%res = atomicrmw fadd float* %ptr, float %value seq_cst
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ret float %res
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}
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define float @test_atomicrmw_fsub_f32(float* %ptr, float %value) {
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; CHECK-LABEL: @test_atomicrmw_fsub_f32(
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; CHECK-NEXT: [[TMP1:%.*]] = alloca float, align 4
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; CHECK-NEXT: [[TMP2:%.*]] = load float, float* [[PTR:%.*]], align 4
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
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; CHECK-NEXT: [[NEW:%.*]] = fsub float [[LOADED]], [[VALUE:%.*]]
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[PTR]] to i8*
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast float* [[TMP1]] to i8*
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; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]])
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; CHECK-NEXT: store float [[LOADED]], float* [[TMP1]], align 4
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; CHECK-NEXT: [[TMP5:%.*]] = bitcast float [[NEW]] to i32
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; CHECK-NEXT: [[TMP6:%.*]] = call zeroext i1 @__atomic_compare_exchange_4(i8* [[TMP3]], i8* [[TMP4]], i32 [[TMP5]], i32 5, i32 5)
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; CHECK-NEXT: [[TMP7:%.*]] = load float, float* [[TMP1]], align 4
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; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]])
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; CHECK-NEXT: [[TMP8:%.*]] = insertvalue { float, i1 } undef, float [[TMP7]], 0
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; CHECK-NEXT: [[TMP9:%.*]] = insertvalue { float, i1 } [[TMP8]], i1 [[TMP6]], 1
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; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { float, i1 } [[TMP9]], 1
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; CHECK-NEXT: [[NEWLOADED]] = extractvalue { float, i1 } [[TMP9]], 0
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; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: ret float [[NEWLOADED]]
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;
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%res = atomicrmw fsub float* %ptr, float %value seq_cst
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ret float %res
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}
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