2016-04-02 02:30:29 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2017-05-04 21:35:40 +08:00
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
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2016-01-04 01:22:03 +08:00
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; PR11580
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define <3 x float> @addf3(<3 x float> %x) {
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2017-05-04 21:35:40 +08:00
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; X86-LABEL: addf3:
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2017-12-05 01:18:51 +08:00
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; X86: # %bb.0: # %entry
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2021-06-12 04:26:17 +08:00
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; X86-NEXT: addps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
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2017-05-04 21:35:40 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: addf3:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2021-06-12 04:26:17 +08:00
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; X64-NEXT: addps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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2017-05-04 21:35:40 +08:00
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; X64-NEXT: retq
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2016-01-04 01:22:03 +08:00
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entry:
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%add = fadd <3 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
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ret <3 x float> %add
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}
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; PR11580
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define <4 x float> @cvtf3_f4(<3 x float> %x) {
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2017-05-04 21:35:40 +08:00
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; X86-LABEL: cvtf3_f4:
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2017-12-05 01:18:51 +08:00
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; X86: # %bb.0: # %entry
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2017-05-04 21:35:40 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: cvtf3_f4:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2017-05-04 21:35:40 +08:00
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; X64-NEXT: retq
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2016-01-04 01:22:03 +08:00
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entry:
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%extractVec = shufflevector <3 x float> %x, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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ret <4 x float> %extractVec
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}
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; PR11580
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define <3 x float> @cvtf4_f3(<4 x float> %x) {
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2017-05-04 21:35:40 +08:00
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; X86-LABEL: cvtf4_f3:
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2017-12-05 01:18:51 +08:00
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; X86: # %bb.0: # %entry
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2017-05-04 21:35:40 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: cvtf4_f3:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2017-05-04 21:35:40 +08:00
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; X64-NEXT: retq
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2016-01-04 01:22:03 +08:00
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entry:
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%extractVec = shufflevector <4 x float> %x, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
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ret <3 x float> %extractVec
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}
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