2019-08-25 13:22:36 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=CHECK,FAST-INCDEC
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SLOW-INCDEC
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define i64 @imm1_Oz(i32 %x, i32 %y) minsize nounwind {
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; CHECK-LABEL: imm1_Oz:
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; CHECK: # %bb.0:
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2019-08-25 13:22:40 +08:00
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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2019-08-25 13:22:36 +08:00
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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2019-08-25 13:22:40 +08:00
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; CHECK-NEXT: leal 1(%rdi), %eax
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; CHECK-NEXT: incl %esi
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; CHECK-NEXT: addq %rsi, %rax
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2019-08-25 13:22:36 +08:00
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; CHECK-NEXT: retq
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%x1 = add i32 %x, 1
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%y1 = add i32 %y, 1
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%x1z = zext i32 %x1 to i64
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%y1z = zext i32 %y1 to i64
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%r = add i64 %x1z, %y1z
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ret i64 %r
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}
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define i64 @imm1_Os(i32 %x, i32 %y) optsize nounwind {
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2019-08-25 13:22:40 +08:00
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; CHECK-LABEL: imm1_Os:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: leal 1(%rdi), %eax
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; CHECK-NEXT: incl %esi
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; CHECK-NEXT: addq %rsi, %rax
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; CHECK-NEXT: retq
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2019-08-25 13:22:36 +08:00
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%x1 = add i32 %x, 1
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%y1 = add i32 %y, 1
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%x1z = zext i32 %x1 to i64
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%y1z = zext i32 %y1 to i64
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%r = add i64 %x1z, %y1z
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ret i64 %r
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}
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define i64 @imm1_O2(i32 %x, i32 %y) nounwind {
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; FAST-INCDEC-LABEL: imm1_O2:
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; FAST-INCDEC: # %bb.0:
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; FAST-INCDEC-NEXT: # kill: def $esi killed $esi def $rsi
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; FAST-INCDEC-NEXT: # kill: def $edi killed $edi def $rdi
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; FAST-INCDEC-NEXT: leal 1(%rdi), %eax
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; FAST-INCDEC-NEXT: incl %esi
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; FAST-INCDEC-NEXT: addq %rsi, %rax
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; FAST-INCDEC-NEXT: retq
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;
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; SLOW-INCDEC-LABEL: imm1_O2:
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; SLOW-INCDEC: # %bb.0:
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; SLOW-INCDEC-NEXT: # kill: def $esi killed $esi def $rsi
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; SLOW-INCDEC-NEXT: # kill: def $edi killed $edi def $rdi
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; SLOW-INCDEC-NEXT: leal 1(%rdi), %eax
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; SLOW-INCDEC-NEXT: addl $1, %esi
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; SLOW-INCDEC-NEXT: addq %rsi, %rax
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; SLOW-INCDEC-NEXT: retq
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%x1 = add i32 %x, 1
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%y1 = add i32 %y, 1
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%x1z = zext i32 %x1 to i64
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%y1z = zext i32 %y1 to i64
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%r = add i64 %x1z, %y1z
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ret i64 %r
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}
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