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llvm-project/llvm/test/CodeGen/X86/pr32588.ll

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[x86] regenerate checks; NFC llvm-svn: 347661
2018-11-27 23:52:17 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
[X86] Create the correct ADC/SBB SDNode when lowering add. Differential Revision: https://reviews.llvm.org/D31911 llvm-svn: 299973
2017-04-12 03:11:20 +08:00
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
[test] Add explicit dso_local to constant/global variable declarations They are currently implicit because TargetMachine::shouldAssumeDSOLocal implies dso_local. For external data, clang -fno-pic emits the dso_local specifier for ELF and non-MinGW COFF. Adding explicit dso_local makes these tests in align with the clang behavior and helps implementing an option to use GOT indirection for external data access in -fno-pic mode (to avoid copy relocations).
2020-12-05 05:51:01 +08:00
@c = external dso_local local_unnamed_addr global i32, align 4
@b = external dso_local local_unnamed_addr global i32, align 4
@d = external dso_local local_unnamed_addr global i32, align 4
[X86] Create the correct ADC/SBB SDNode when lowering add. Differential Revision: https://reviews.llvm.org/D31911 llvm-svn: 299973
2017-04-12 03:11:20 +08:00
define void @fn1() {
[x86] regenerate checks; NFC llvm-svn: 347661
2018-11-27 23:52:17 +08:00
; CHECK-LABEL: fn1:
; CHECK: # %bb.0:
[NFC][X86][Codegen] Megacommit: mass-regenerate all check lines that were already autogenerated The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
2021-06-12 04:26:17 +08:00
; CHECK-NEXT: cmpl $1, c(%rip)
[x86] regenerate checks; NFC llvm-svn: 347661
2018-11-27 23:52:17 +08:00
; CHECK-NEXT: sbbl %eax, %eax
; CHECK-NEXT: andl $1, %eax
[NFC][X86][Codegen] Megacommit: mass-regenerate all check lines that were already autogenerated The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
2021-06-12 04:26:17 +08:00
; CHECK-NEXT: movl %eax, d(%rip)
[x86] regenerate checks; NFC llvm-svn: 347661
2018-11-27 23:52:17 +08:00
; CHECK-NEXT: retq
%t0 = load i32, i32* @c, align 4
%tobool1 = icmp eq i32 %t0, 0
[X86] Create the correct ADC/SBB SDNode when lowering add. Differential Revision: https://reviews.llvm.org/D31911 llvm-svn: 299973
2017-04-12 03:11:20 +08:00
%xor = zext i1 %tobool1 to i32
[x86] regenerate checks; NFC llvm-svn: 347661
2018-11-27 23:52:17 +08:00
%t1 = load i32, i32* @b, align 4
%tobool2 = icmp ne i32 %t1, 0
[X86] Avoid icmp undef in reduced tests Because we don't currently simplify icmp with undef in DAG, bugpoint loves to introduce them during reduction. This is a small step towards re-adding non-undef values into some of the simpler tests so that they should still test correctly and emit similar/same codegen. Prep work for PR40800 ([SelectionDAG] Add UNDEF handling to SelectionDAG::FoldSetCC). llvm-svn: 356076
2019-03-14 02:36:59 +08:00
%t2 = load i32, i32* @d, align 4
%tobool4 = icmp ne i32 %t2, 0
%t3 = and i1 %tobool4, %tobool2
%sub = sext i1 %t3 to i32
[X86] Create the correct ADC/SBB SDNode when lowering add. Differential Revision: https://reviews.llvm.org/D31911 llvm-svn: 299973
2017-04-12 03:11:20 +08:00
%div = sdiv i32 %sub, 2
%add = add nsw i32 %div, %xor
store i32 %add, i32* @d, align 4
ret void
}