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llvm-project/llvm/test/CodeGen/SystemZ/asm-04.ll

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[SystemZ] Add CodeGen test cases This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
2013-05-07 00:17:29 +08:00
; Test the "T" asm constraint, which accepts addresses that have a base,
; an index and a 20-bit displacement.
;
Use the integrated assembler as default on SystemZ This was already done in clang, this commit now uses the integrated assembler as default when using LLVM tools directly. A number of test cases deliberately using an invalid instruction in inline asm now have to use -no-integrated-as. llvm-svn: 225820
2015-01-14 03:45:16 +08:00
; RUN: llc < %s -mtriple=s390x-linux-gnu -no-integrated-as | FileCheck %s
[SystemZ] Add CodeGen test cases This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
2013-05-07 00:17:29 +08:00
[SystemZ] Enable index register memory constraints for inline ASM This enables use of the 'R' and 'T' memory constraints for inline ASM operands on SystemZ, which allow an index register as well as an immediate displacement. This patch includes corresponding documentation and test case updates. As with the last patch of this kind, I moved the 'm' constraint to the most general case, which is now 'T' (base + 20-bit signed displacement + index register). Author: colpell Differential Revision: http://reviews.llvm.org/D21239 llvm-svn: 272547
2016-06-13 22:24:05 +08:00
; Check the lowest range.
[SystemZ] Add CodeGen test cases This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
2013-05-07 00:17:29 +08:00
define void @f1(i64 %base) {
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: f1:
[SystemZ] Enable index register memory constraints for inline ASM This enables use of the 'R' and 'T' memory constraints for inline ASM operands on SystemZ, which allow an index register as well as an immediate displacement. This patch includes corresponding documentation and test case updates. As with the last patch of this kind, I moved the 'm' constraint to the most general case, which is now 'T' (base + 20-bit signed displacement + index register). Author: colpell Differential Revision: http://reviews.llvm.org/D21239 llvm-svn: 272547
2016-06-13 22:24:05 +08:00
; CHECK: blah -524288(%r2)
; CHECK: br %r14
%add = add i64 %base, -524288
%addr = inttoptr i64 %add to i64 *
call void asm "blah $0", "=*T" (i64 *%addr)
ret void
}
; Check the next lowest byte.
define void @f2(i64 %base) {
; CHECK-LABEL: f2:
; CHECK: agfi %r2, -524289
[SystemZ] Add CodeGen test cases This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
2013-05-07 00:17:29 +08:00
; CHECK: blah 0(%r2)
; CHECK: br %r14
[SystemZ] Enable index register memory constraints for inline ASM This enables use of the 'R' and 'T' memory constraints for inline ASM operands on SystemZ, which allow an index register as well as an immediate displacement. This patch includes corresponding documentation and test case updates. As with the last patch of this kind, I moved the 'm' constraint to the most general case, which is now 'T' (base + 20-bit signed displacement + index register). Author: colpell Differential Revision: http://reviews.llvm.org/D21239 llvm-svn: 272547
2016-06-13 22:24:05 +08:00
%add = add i64 %base, -524289
%addr = inttoptr i64 %add to i64 *
[SystemZ] Add CodeGen test cases This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
2013-05-07 00:17:29 +08:00
call void asm "blah $0", "=*T" (i64 *%addr)
ret void
}
[SystemZ] Enable index register memory constraints for inline ASM This enables use of the 'R' and 'T' memory constraints for inline ASM operands on SystemZ, which allow an index register as well as an immediate displacement. This patch includes corresponding documentation and test case updates. As with the last patch of this kind, I moved the 'm' constraint to the most general case, which is now 'T' (base + 20-bit signed displacement + index register). Author: colpell Differential Revision: http://reviews.llvm.org/D21239 llvm-svn: 272547
2016-06-13 22:24:05 +08:00
; Check the highest range.
define void @f3(i64 %base) {
; CHECK-LABEL: f3:
; CHECK: blah 524287(%r2)
; CHECK: br %r14
%add = add i64 %base, 524287
%addr = inttoptr i64 %add to i64 *
call void asm "blah $0", "=*T" (i64 *%addr)
ret void
}
; Check the next highest byte.
define void @f4(i64 %base) {
; CHECK-LABEL: f4:
; CHECK: agfi %r2, 524288
; CHECK: blah 0(%r2)
; CHECK: br %r14
%add = add i64 %base, 524288
%addr = inttoptr i64 %add to i64 *
call void asm "blah $0", "=*T" (i64 *%addr)
ret void
}
; Check that indices are allowed
define void @f5(i64 %base, i64 %index) {
; CHECK-LABEL: f5:
; CHECK: blah 0(%r3,%r2)
; CHECK: br %r14
%add = add i64 %base, %index
%addr = inttoptr i64 %add to i64 *
call void asm "blah $0", "=*T" (i64 *%addr)
ret void
}
; Check that indices and displacements are allowed simultaneously
define void @f6(i64 %base, i64 %index) {
; CHECK-LABEL: f6:
; CHECK: blah 524287(%r3,%r2)
; CHECK: br %r14
%add = add i64 %base, 524287
%addi = add i64 %add, %index
%addr = inttoptr i64 %addi to i64 *
call void asm "blah $0", "=*T" (i64 *%addr)
ret void
}