forked from OSchip/llvm-project
26 lines
725 B
Plaintext
26 lines
725 B
Plaintext
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{
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"name": "%1 => %17",
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"context": "{ [] }",
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"statements": [{
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"name": "Stmt_6",
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"domain": "{ Stmt_6[i0, i1, i2] : i0 >= 0 and i0 <= 1023 and i1 >= 0 and i1 <= 1023 and i2 >= 0 and i2 <= 1023 }",
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"schedule": "{ Stmt_6[i0, i2, i1] -> scattering[i0, i1, o, i2] : exists (e0 = [(o)/4]: 4e0 = o and o <= i2 and o >= -3 + i2) }",
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"accesses": [{
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"kind": "read",
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"relation": "{ Stmt_6[i0, i1, i2] -> MemRef_A[i0 + 1024i2] }"
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},
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{
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"kind": "read",
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"relation": "{ Stmt_6[i0, i1, i2] -> MemRef_B[1024i1 + i2] }"
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},
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{
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"kind": "read",
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"relation": "{ Stmt_6[i0, i1, i2] -> MemRef_C[1024i0 + i1] }"
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},
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{
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"kind": "write",
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"relation": "{ Stmt_6[i0, i1, i2] -> MemRef_C[1024i0 + i1] }"
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}]
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}]
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}
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