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llvm-project/llvm/test/CodeGen/X86/clwb.ll

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[X86] Add the test case for r315613 that I forgot to 'git add'. llvm-svn: 315649
2017-10-13 08:20:47 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
[X86] Disable CLWB for Cannon Lake Cannon Lake does not support CLWB, therefore it does not include all features listed under SKX anymore. Instead, enumerate all SKX features with the exception of CLWB. Patch by Gabor Buella Differential Revision: https://reviews.llvm.org/D43380 llvm-svn: 325654
2018-02-21 08:15:48 +08:00
; NOTE: clwb is available in Skylake Server, not available in the newer
; NOTE: Cannon Lake arch, but available again in the newer Ice Lake arch.
[X86] Add the test case for r315613 that I forgot to 'git add'. llvm-svn: 315649
2017-10-13 08:20:47 +08:00
; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=clwb | FileCheck %s
[X86] Disable CLWB for Cannon Lake Cannon Lake does not support CLWB, therefore it does not include all features listed under SKX anymore. Instead, enumerate all SKX features with the exception of CLWB. Patch by Gabor Buella Differential Revision: https://reviews.llvm.org/D43380 llvm-svn: 325654
2018-02-21 08:15:48 +08:00
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s
; RUN: not llc < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL
[X86] Split up -march=icelake to -client & -server Reviewers: craig.topper, zvi, echristo Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D45055 llvm-svn: 329742
2018-04-11 02:59:13 +08:00
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-client | FileCheck %s
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-server | FileCheck %s
[X86] Disable CLWB for Cannon Lake Cannon Lake does not support CLWB, therefore it does not include all features listed under SKX anymore. Instead, enumerate all SKX features with the exception of CLWB. Patch by Gabor Buella Differential Revision: https://reviews.llvm.org/D43380 llvm-svn: 325654
2018-02-21 08:15:48 +08:00
; CNL: LLVM ERROR: Cannot select: intrinsic %llvm.x86.clwb
[X86] Add the test case for r315613 that I forgot to 'git add'. llvm-svn: 315649
2017-10-13 08:20:47 +08:00
define void @clwb(i8* %p) nounwind {
; CHECK-LABEL: clwb:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK: ## %bb.0:
[X86] Add the test case for r315613 that I forgot to 'git add'. llvm-svn: 315649
2017-10-13 08:20:47 +08:00
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: clwb (%eax)
; CHECK-NEXT: retl
tail call void @llvm.x86.clwb(i8* %p)
ret void
}
declare void @llvm.x86.clwb(i8*) nounwind