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llvm-project/llvm/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll

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X86: Do not use llc -march in tests. `llc -march` is problematic because it only switches the target architecture, but leaves the operating system unchanged. This occasionally leads to indeterministic tests because the OS from LLVM_DEFAULT_TARGET_TRIPLE is used. However we can simply always use `llc -mtriple` instead. This changes all the tests to do this to avoid people using -march when they copy and paste parts of tests. See also the discussion in https://reviews.llvm.org/D35287 llvm-svn: 309774
2017-08-02 08:28:10 +08:00
; RUN: llc < %s -mtriple=i686--
Fix a dagga combiner bug: avoid creating illegal constant. Is this really a winning transformation? fold (shl (srl x, c1), c2) -> (shl (and x, (shl -1, c1)), (sub c2, c1)) or (srl (and x, (shl -1, c1)), (sub c1, c2)) llvm-svn: 76535
2009-07-21 13:40:15 +08:00
@bsBuff = internal global i32 0 ; <i32*> [#uses=1]
@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @bsGetUInt32 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
define fastcc i32 @bsGetUInt32() nounwind ssp {
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%bsBuff.promoted44 = load i32, i32* @bsBuff ; <i32> [#uses=1]
Fix a dagga combiner bug: avoid creating illegal constant. Is this really a winning transformation? fold (shl (srl x, c1), c2) -> (shl (and x, (shl -1, c1)), (sub c2, c1)) or (srl (and x, (shl -1, c1)), (sub c1, c2)) llvm-svn: 76535
2009-07-21 13:40:15 +08:00
%0 = add i32 0, -8 ; <i32> [#uses=1]
%1 = lshr i32 %bsBuff.promoted44, %0 ; <i32> [#uses=1]
%2 = shl i32 %1, 8 ; <i32> [#uses=1]
br label %bb3.i17
bb3.i9: ; preds = %bb3.i17
br i1 false, label %bb2.i16, label %bb1.i15
bb1.i15: ; preds = %bb3.i9
unreachable
bb2.i16: ; preds = %bb3.i9
br label %bb3.i17
bb3.i17: ; preds = %bb2.i16, %entry
br i1 false, label %bb3.i9, label %bsR.exit18
bsR.exit18: ; preds = %bb3.i17
%3 = or i32 0, %2 ; <i32> [#uses=0]
ret i32 0
}