2016-10-24 23:43:40 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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Reapply r165661, Patch by Shuxin Yang <shuxin.llvm@gmail.com>.
Original message:
The attached is the fix to radar://11663049. The optimization can be outlined by following rules:
(select (x != c), e, c) -> select (x != c), e, x),
(select (x == c), c, e) -> select (x == c), x, e)
where the <c> is an integer constant.
The reason for this change is that : on x86, conditional-move-from-constant needs two instructions;
however, conditional-move-from-register need only one instruction.
While the LowerSELECT() sounds to be the most convenient place for this optimization, it turns out to be a bad place. The reason is that by replacing the constant <c> with a symbolic value, it obscure some instruction-combining opportunities which would otherwise be very easy to spot. For that reason, I have to postpone the change to last instruction-combining phase.
The change passes the test of "make check-all -C <build-root/test" and "make -C project/test-suite/SingleSource".
Original message since r165661:
My previous change has a bug: I negated the condition code of a CMOV, and go ahead creating a new CMOV using the *ORIGINAL* condition code.
llvm-svn: 166017
2012-10-16 14:28:34 +08:00
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2016-10-25 03:13:29 +08:00
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define i32 @select_0_or_1(i1 %cond) {
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; CHECK-LABEL: select_0_or_1:
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; CHECK: # BB#0:
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; CHECK-NEXT: notb %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: retq
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;
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%sel = select i1 %cond, i32 0, i32 1
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ret i32 %sel
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}
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define i32 @select_0_or_1_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_0_or_1_zeroext:
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; CHECK: # BB#0:
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; CHECK-NEXT: xorb $1, %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: retq
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;
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%sel = select i1 %cond, i32 0, i32 1
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ret i32 %sel
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}
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define i32 @select_1_or_0(i1 %cond) {
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; CHECK-LABEL: select_1_or_0:
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; CHECK: # BB#0:
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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;
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%sel = select i1 %cond, i32 1, i32 0
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ret i32 %sel
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}
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define i32 @select_1_or_0_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_1_or_0_zeroext:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: retq
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;
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%sel = select i1 %cond, i32 1, i32 0
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ret i32 %sel
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}
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define i32 @select_0_or_neg1(i1 %cond) {
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; CHECK-LABEL: select_0_or_neg1:
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; CHECK: # BB#0:
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; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: leal -1(%rdi), %eax
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; CHECK-NEXT: retq
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;
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%sel = select i1 %cond, i32 0, i32 -1
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ret i32 %sel
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}
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define i32 @select_0_or_neg1_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_0_or_neg1_zeroext:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: decl %eax
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; CHECK-NEXT: retq
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;
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%sel = select i1 %cond, i32 0, i32 -1
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ret i32 %sel
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}
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define i32 @select_neg1_or_0(i1 %cond) {
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; CHECK-LABEL: select_neg1_or_0:
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; CHECK: # BB#0:
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: movl $-1, %eax
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; CHECK-NEXT: cmovel %ecx, %eax
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; CHECK-NEXT: retq
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;
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%sel = select i1 %cond, i32 -1, i32 0
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ret i32 %sel
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}
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define i32 @select_neg1_or_0_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_neg1_or_0_zeroext:
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; CHECK: # BB#0:
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: testb %dil, %dil
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; CHECK-NEXT: movl $-1, %eax
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; CHECK-NEXT: cmovel %ecx, %eax
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; CHECK-NEXT: retq
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;
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%sel = select i1 %cond, i32 -1, i32 0
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ret i32 %sel
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}
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2016-10-24 23:43:40 +08:00
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define i64 @select_2_or_inc(i64 %x) {
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; CHECK-LABEL: select_2_or_inc:
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; CHECK: # BB#0:
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; CHECK-NEXT: leaq 1(%rdi), %rax
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; CHECK-NEXT: cmpq $2, %rdi
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; CHECK-NEXT: cmoveq %rdi, %rax
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; CHECK-NEXT: retq
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;
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Reapply r165661, Patch by Shuxin Yang <shuxin.llvm@gmail.com>.
Original message:
The attached is the fix to radar://11663049. The optimization can be outlined by following rules:
(select (x != c), e, c) -> select (x != c), e, x),
(select (x == c), c, e) -> select (x == c), x, e)
where the <c> is an integer constant.
The reason for this change is that : on x86, conditional-move-from-constant needs two instructions;
however, conditional-move-from-register need only one instruction.
While the LowerSELECT() sounds to be the most convenient place for this optimization, it turns out to be a bad place. The reason is that by replacing the constant <c> with a symbolic value, it obscure some instruction-combining opportunities which would otherwise be very easy to spot. For that reason, I have to postpone the change to last instruction-combining phase.
The change passes the test of "make check-all -C <build-root/test" and "make -C project/test-suite/SingleSource".
Original message since r165661:
My previous change has a bug: I negated the condition code of a CMOV, and go ahead creating a new CMOV using the *ORIGINAL* condition code.
llvm-svn: 166017
2012-10-16 14:28:34 +08:00
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%cmp = icmp eq i64 %x, 2
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%add = add i64 %x, 1
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%retval.0 = select i1 %cmp, i64 2, i64 %add
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ret i64 %retval.0
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}
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2016-10-24 23:43:40 +08:00
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