forked from OSchip/llvm-project
26 lines
901 B
TableGen
26 lines
901 B
TableGen
|
//===- AMDIL.td - AMDIL Target Machine -------------*- tablegen -*-===//
|
||
|
|
//
|
||
|
|
// The LLVM Compiler Infrastructure
|
||
|
|
//
|
||
|
|
// This file is distributed under the University of Illinois Open Source
|
||
|
|
// License. See LICENSE.TXT for details.
|
||
|
|
//
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
// Target-independent interfaces which we are implementing
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
|
||
|
|
include "llvm/Target/Target.td"
|
||
|
|
|
||
|
|
// Dummy Instruction itineraries for pseudo instructions
|
||
|
|
def ALU_NULL : FuncUnit;
|
||
|
|
def NullALU : InstrItinClass;
|
||
|
|
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
// Register File, Calling Conv, Instruction Descriptions
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
|
||
|
|
|
||
|
|
include "AMDILRegisterInfo.td"
|
||
|
|
include "AMDILInstrInfo.td"
|
||
|
|
|