2016-11-16 22:12:11 +08:00
|
|
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
|
|
; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X32
|
|
|
|
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
|
2007-09-26 02:23:27 +08:00
|
|
|
|
2016-11-16 22:12:11 +08:00
|
|
|
define void @si64(i64 %x, i64 %y, i64* %p, i64* %q) nounwind {
|
|
|
|
; X32-LABEL: si64:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X32: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: pushl %ebp
|
|
|
|
; X32-NEXT: pushl %ebx
|
|
|
|
; X32-NEXT: pushl %edi
|
|
|
|
; X32-NEXT: pushl %esi
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
|
|
|
|
; X32-NEXT: pushl %ebp
|
|
|
|
; X32-NEXT: pushl %ebx
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp)
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp)
|
|
|
|
; X32-NEXT: calll __divdi3
|
|
|
|
; X32-NEXT: addl $16, %esp
|
|
|
|
; X32-NEXT: movl %eax, %esi
|
|
|
|
; X32-NEXT: movl %edx, %edi
|
|
|
|
; X32-NEXT: pushl %ebp
|
|
|
|
; X32-NEXT: pushl %ebx
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp)
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp)
|
|
|
|
; X32-NEXT: calll __moddi3
|
|
|
|
; X32-NEXT: addl $16, %esp
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X32-NEXT: movl %edi, 4(%ecx)
|
|
|
|
; X32-NEXT: movl %esi, (%ecx)
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X32-NEXT: movl %edx, 4(%ecx)
|
|
|
|
; X32-NEXT: movl %eax, (%ecx)
|
|
|
|
; X32-NEXT: popl %esi
|
|
|
|
; X32-NEXT: popl %edi
|
|
|
|
; X32-NEXT: popl %ebx
|
|
|
|
; X32-NEXT: popl %ebp
|
|
|
|
; X32-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: si64:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X64: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: movq %rdx, %r8
|
|
|
|
; X64-NEXT: movq %rdi, %rax
|
|
|
|
; X64-NEXT: cqto
|
|
|
|
; X64-NEXT: idivq %rsi
|
|
|
|
; X64-NEXT: movq %rax, (%r8)
|
|
|
|
; X64-NEXT: movq %rdx, (%rcx)
|
|
|
|
; X64-NEXT: retq
|
2007-09-26 02:23:27 +08:00
|
|
|
%r = sdiv i64 %x, %y
|
|
|
|
%t = srem i64 %x, %y
|
|
|
|
store i64 %r, i64* %p
|
|
|
|
store i64 %t, i64* %q
|
|
|
|
ret void
|
|
|
|
}
|
2016-11-16 22:12:11 +08:00
|
|
|
|
|
|
|
define void @si32(i32 %x, i32 %y, i32* %p, i32* %q) nounwind {
|
|
|
|
; X32-LABEL: si32:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X32: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X32-NEXT: cltd
|
|
|
|
; X32-NEXT: idivl {{[0-9]+}}(%esp)
|
2018-09-26 18:42:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: movl %eax, (%esi)
|
|
|
|
; X32-NEXT: movl %edx, (%ecx)
|
|
|
|
; X32-NEXT: popl %esi
|
|
|
|
; X32-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: si32:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X64: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: movq %rdx, %r8
|
|
|
|
; X64-NEXT: movl %edi, %eax
|
|
|
|
; X64-NEXT: cltd
|
|
|
|
; X64-NEXT: idivl %esi
|
|
|
|
; X64-NEXT: movl %eax, (%r8)
|
|
|
|
; X64-NEXT: movl %edx, (%rcx)
|
|
|
|
; X64-NEXT: retq
|
2007-09-26 02:23:27 +08:00
|
|
|
%r = sdiv i32 %x, %y
|
|
|
|
%t = srem i32 %x, %y
|
|
|
|
store i32 %r, i32* %p
|
|
|
|
store i32 %t, i32* %q
|
|
|
|
ret void
|
|
|
|
}
|
2016-11-16 22:12:11 +08:00
|
|
|
|
|
|
|
define void @si16(i16 %x, i16 %y, i16* %p, i16* %q) nounwind {
|
|
|
|
; X32-LABEL: si16:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X32: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
|
|
|
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X32-NEXT: cwtd
|
|
|
|
; X32-NEXT: idivw {{[0-9]+}}(%esp)
|
2018-09-26 18:42:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: movw %ax, (%esi)
|
|
|
|
; X32-NEXT: movw %dx, (%ecx)
|
|
|
|
; X32-NEXT: popl %esi
|
|
|
|
; X32-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: si16:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X64: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: movq %rdx, %r8
|
|
|
|
; X64-NEXT: movl %edi, %eax
|
2018-09-20 02:59:08 +08:00
|
|
|
; X64-NEXT: # kill: def $ax killed $ax killed $eax
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: cwtd
|
|
|
|
; X64-NEXT: idivw %si
|
|
|
|
; X64-NEXT: movw %ax, (%r8)
|
|
|
|
; X64-NEXT: movw %dx, (%rcx)
|
|
|
|
; X64-NEXT: retq
|
2007-09-26 02:23:27 +08:00
|
|
|
%r = sdiv i16 %x, %y
|
|
|
|
%t = srem i16 %x, %y
|
|
|
|
store i16 %r, i16* %p
|
|
|
|
store i16 %t, i16* %q
|
|
|
|
ret void
|
|
|
|
}
|
2016-11-16 22:12:11 +08:00
|
|
|
|
|
|
|
define void @si8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind {
|
|
|
|
; X32-LABEL: si8:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X32: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: pushl %ebx
|
|
|
|
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
|
|
|
|
; X32-NEXT: cbtw
|
|
|
|
; X32-NEXT: idivb {{[0-9]+}}(%esp)
|
2018-09-26 18:42:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
2018-01-23 13:37:00 +08:00
|
|
|
; X32-NEXT: movsbl %ah, %ebx
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: movb %al, (%edx)
|
|
|
|
; X32-NEXT: movb %bl, (%ecx)
|
|
|
|
; X32-NEXT: popl %ebx
|
|
|
|
; X32-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: si8:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X64: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: movl %edi, %eax
|
2018-09-20 02:59:08 +08:00
|
|
|
; X64-NEXT: # kill: def $al killed $al killed $eax
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: cbtw
|
|
|
|
; X64-NEXT: idivb %sil
|
2018-01-23 13:37:00 +08:00
|
|
|
; X64-NEXT: movsbl %ah, %esi
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: movb %al, (%rdx)
|
|
|
|
; X64-NEXT: movb %sil, (%rcx)
|
|
|
|
; X64-NEXT: retq
|
2007-09-26 02:23:27 +08:00
|
|
|
%r = sdiv i8 %x, %y
|
|
|
|
%t = srem i8 %x, %y
|
|
|
|
store i8 %r, i8* %p
|
|
|
|
store i8 %t, i8* %q
|
|
|
|
ret void
|
|
|
|
}
|
2016-11-16 22:12:11 +08:00
|
|
|
|
|
|
|
define void @ui64(i64 %x, i64 %y, i64* %p, i64* %q) nounwind {
|
|
|
|
; X32-LABEL: ui64:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X32: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: pushl %ebp
|
|
|
|
; X32-NEXT: pushl %ebx
|
|
|
|
; X32-NEXT: pushl %edi
|
|
|
|
; X32-NEXT: pushl %esi
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
|
|
|
|
; X32-NEXT: pushl %ebp
|
|
|
|
; X32-NEXT: pushl %ebx
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp)
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp)
|
|
|
|
; X32-NEXT: calll __udivdi3
|
|
|
|
; X32-NEXT: addl $16, %esp
|
|
|
|
; X32-NEXT: movl %eax, %esi
|
|
|
|
; X32-NEXT: movl %edx, %edi
|
|
|
|
; X32-NEXT: pushl %ebp
|
|
|
|
; X32-NEXT: pushl %ebx
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp)
|
|
|
|
; X32-NEXT: pushl {{[0-9]+}}(%esp)
|
|
|
|
; X32-NEXT: calll __umoddi3
|
|
|
|
; X32-NEXT: addl $16, %esp
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X32-NEXT: movl %edi, 4(%ecx)
|
|
|
|
; X32-NEXT: movl %esi, (%ecx)
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X32-NEXT: movl %edx, 4(%ecx)
|
|
|
|
; X32-NEXT: movl %eax, (%ecx)
|
|
|
|
; X32-NEXT: popl %esi
|
|
|
|
; X32-NEXT: popl %edi
|
|
|
|
; X32-NEXT: popl %ebx
|
|
|
|
; X32-NEXT: popl %ebp
|
|
|
|
; X32-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: ui64:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X64: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: movq %rdx, %r8
|
|
|
|
; X64-NEXT: movq %rdi, %rax
|
2018-09-20 02:59:08 +08:00
|
|
|
; X64-NEXT: xorl %edx, %edx
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: divq %rsi
|
|
|
|
; X64-NEXT: movq %rax, (%r8)
|
|
|
|
; X64-NEXT: movq %rdx, (%rcx)
|
|
|
|
; X64-NEXT: retq
|
2007-09-26 02:23:27 +08:00
|
|
|
%r = udiv i64 %x, %y
|
|
|
|
%t = urem i64 %x, %y
|
|
|
|
store i64 %r, i64* %p
|
|
|
|
store i64 %t, i64* %q
|
|
|
|
ret void
|
|
|
|
}
|
2016-11-16 22:12:11 +08:00
|
|
|
|
|
|
|
define void @ui32(i32 %x, i32 %y, i32* %p, i32* %q) nounwind {
|
|
|
|
; X32-LABEL: ui32:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X32: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X32-NEXT: xorl %edx, %edx
|
|
|
|
; X32-NEXT: divl {{[0-9]+}}(%esp)
|
2018-09-26 18:42:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: movl %eax, (%esi)
|
|
|
|
; X32-NEXT: movl %edx, (%ecx)
|
|
|
|
; X32-NEXT: popl %esi
|
|
|
|
; X32-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: ui32:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X64: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: movq %rdx, %r8
|
|
|
|
; X64-NEXT: movl %edi, %eax
|
2018-09-20 02:59:08 +08:00
|
|
|
; X64-NEXT: xorl %edx, %edx
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: divl %esi
|
|
|
|
; X64-NEXT: movl %eax, (%r8)
|
|
|
|
; X64-NEXT: movl %edx, (%rcx)
|
|
|
|
; X64-NEXT: retq
|
2007-09-26 02:23:27 +08:00
|
|
|
%r = udiv i32 %x, %y
|
|
|
|
%t = urem i32 %x, %y
|
|
|
|
store i32 %r, i32* %p
|
|
|
|
store i32 %t, i32* %q
|
|
|
|
ret void
|
|
|
|
}
|
2016-11-16 22:12:11 +08:00
|
|
|
|
|
|
|
define void @ui16(i16 %x, i16 %y, i16* %p, i16* %q) nounwind {
|
|
|
|
; X32-LABEL: ui16:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X32: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: pushl %esi
|
|
|
|
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X32-NEXT: xorl %edx, %edx
|
|
|
|
; X32-NEXT: divw {{[0-9]+}}(%esp)
|
2018-09-26 18:42:41 +08:00
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
2016-11-16 22:12:11 +08:00
|
|
|
; X32-NEXT: movw %ax, (%esi)
|
|
|
|
; X32-NEXT: movw %dx, (%ecx)
|
|
|
|
; X32-NEXT: popl %esi
|
|
|
|
; X32-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: ui16:
|
2017-12-05 01:18:51 +08:00
|
|
|
; X64: # %bb.0:
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: movq %rdx, %r8
|
|
|
|
; X64-NEXT: movl %edi, %eax
|
2018-09-20 02:59:08 +08:00
|
|
|
; X64-NEXT: # kill: def $ax killed $ax killed $eax
|
Bias physical register immediate assignments
The machine scheduler currently biases register copies to/from
physical registers to be closer to their point of use / def to
minimize their live ranges. This change extends this to also physical
register assignments from immediate values.
This causes a reduction in reduction in overall register pressure and
minor reduction in spills and indirectly fixes an out-of-registers
assertion (PR39391).
Most test changes are from minor instruction reorderings and register
name selection changes and direct consequences of that.
Reviewers: MatzeB, qcolombet, myatsina, pcc
Subscribers: nemanjai, jvesely, nhaehnle, eraman, hiraditya,
javed.absar, arphaman, jfb, jsji, llvm-commits
Differential Revision: https://reviews.llvm.org/D54218
llvm-svn: 346894
2018-11-15 05:11:53 +08:00
|
|
|
; X64-NEXT: xorl %edx, %edx
|
2016-11-16 22:12:11 +08:00
|
|
|
; X64-NEXT: divw %si
|
|
|
|
; X64-NEXT: movw %ax, (%r8)
|
|
|
|
; X64-NEXT: movw %dx, (%rcx)
|
|
|
|
; X64-NEXT: retq
|
2007-09-26 02:23:27 +08:00
|
|
|
%r = udiv i16 %x, %y
|
|
|
|
%t = urem i16 %x, %y
|
|
|
|
store i16 %r, i16* %p
|
|
|
|
store i16 %t, i16* %q
|
|
|
|
ret void
|
|
|
|
}
|
2016-11-16 22:12:11 +08:00
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define void @ui8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind {
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; X32-LABEL: ui8:
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2017-12-05 01:18:51 +08:00
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; X32: # %bb.0:
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2016-11-16 22:12:11 +08:00
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; X32-NEXT: pushl %ebx
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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2018-02-01 06:04:26 +08:00
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; X32-NEXT: # kill: def $eax killed $eax def $ax
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2016-11-16 22:12:11 +08:00
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; X32-NEXT: divb {{[0-9]+}}(%esp)
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2018-09-26 18:42:41 +08:00
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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2018-01-23 13:37:00 +08:00
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; X32-NEXT: movzbl %ah, %ebx
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2016-11-16 22:12:11 +08:00
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; X32-NEXT: movb %al, (%edx)
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; X32-NEXT: movb %bl, (%ecx)
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; X32-NEXT: popl %ebx
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; X32-NEXT: retl
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;
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; X64-LABEL: ui8:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0:
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2016-11-16 22:12:11 +08:00
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; X64-NEXT: movzbl %dil, %eax
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2018-02-01 06:04:26 +08:00
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; X64-NEXT: # kill: def $eax killed $eax def $ax
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2016-11-16 22:12:11 +08:00
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; X64-NEXT: divb %sil
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2018-01-23 13:37:00 +08:00
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; X64-NEXT: movzbl %ah, %esi
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2016-11-16 22:12:11 +08:00
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; X64-NEXT: movb %al, (%rdx)
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; X64-NEXT: movb %sil, (%rcx)
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; X64-NEXT: retq
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2007-09-26 02:23:27 +08:00
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%r = udiv i8 %x, %y
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%t = urem i8 %x, %y
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store i8 %r, i8* %p
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store i8 %t, i8* %q
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ret void
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}
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