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llvm-project/llvm/test/CodeGen/X86/bigstructret.ll

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[X86] Regenerate big structure return test and check on x86_64 as well. llvm-svn: 309676
2017-08-01 21:12:15 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
x86 users can now return arbitrary sized structs. Structs too large to fit in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction. llvm-svn: 86876
2009-11-12 03:59:24 +08:00
%0 = type { i32, i32, i32, i32 }
Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process. llvm-svn: 157446
2012-05-25 08:09:29 +08:00
%1 = type { i1, i1, i1, i32 }
x86 users can now return arbitrary sized structs. Structs too large to fit in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction. llvm-svn: 86876
2009-11-12 03:59:24 +08:00
Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process. llvm-svn: 157446
2012-05-25 08:09:29 +08:00
define fastcc %0 @ReturnBigStruct() nounwind readnone {
[X86] Regenerate big structure return test and check on x86_64 as well. llvm-svn: 309676
2017-08-01 21:12:15 +08:00
; X86-LABEL: ReturnBigStruct:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X86: # %bb.0: # %entry
[X86] Handle COPYs of physregs better (regalloc hints) Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
2018-09-20 02:59:08 +08:00
; X86-NEXT: movl %ecx, %eax
[X86] Regenerate big structure return test and check on x86_64 as well. llvm-svn: 309676
2017-08-01 21:12:15 +08:00
; X86-NEXT: movl $24601, 12(%ecx) # imm = 0x6019
; X86-NEXT: movl $48, 8(%ecx)
; X86-NEXT: movl $24, 4(%ecx)
; X86-NEXT: movl $12, (%ecx)
; X86-NEXT: retl
;
; X64-LABEL: ReturnBigStruct:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X64: # %bb.0: # %entry
[X86] Regenerate big structure return test and check on x86_64 as well. llvm-svn: 309676
2017-08-01 21:12:15 +08:00
; X64-NEXT: movq %rdi, %rax
[X86] Handle COPYs of physregs better (regalloc hints) Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
2018-09-20 02:59:08 +08:00
; X64-NEXT: movabsq $105660490448944, %rcx # imm = 0x601900000030
; X64-NEXT: movq %rcx, 8(%rdi)
; X64-NEXT: movabsq $103079215116, %rcx # imm = 0x180000000C
; X64-NEXT: movq %rcx, (%rdi)
[X86] Regenerate big structure return test and check on x86_64 as well. llvm-svn: 309676
2017-08-01 21:12:15 +08:00
; X64-NEXT: retq
x86 users can now return arbitrary sized structs. Structs too large to fit in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction. llvm-svn: 86876
2009-11-12 03:59:24 +08:00
entry:
%0 = insertvalue %0 zeroinitializer, i32 12, 0
%1 = insertvalue %0 %0, i32 24, 1
%2 = insertvalue %0 %1, i32 48, 2
%3 = insertvalue %0 %2, i32 24601, 3
ret %0 %3
}
[X86][DAG] Switch X86 Target to post-legalized store merge Move store merge to happen after intrinsic lowering to allow lowered stores to be merged. Some regressions due in MergeConsecutiveStores to missing insert_subvector that are addressed in follow up patch. Reviewers: craig.topper, efriedma, RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34559 llvm-svn: 310710
2017-08-11 21:21:35 +08:00
Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process. llvm-svn: 157446
2012-05-25 08:09:29 +08:00
define fastcc %1 @ReturnBigStruct2() nounwind readnone {
[X86] Regenerate big structure return test and check on x86_64 as well. llvm-svn: 309676
2017-08-01 21:12:15 +08:00
; X86-LABEL: ReturnBigStruct2:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X86: # %bb.0: # %entry
[X86] Handle COPYs of physregs better (regalloc hints) Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
2018-09-20 02:59:08 +08:00
; X86-NEXT: movl %ecx, %eax
[X86] Regenerate big structure return test and check on x86_64 as well. llvm-svn: 309676
2017-08-01 21:12:15 +08:00
; X86-NEXT: movl $48, 4(%ecx)
; X86-NEXT: movb $1, 2(%ecx)
[X86][DAG] Switch X86 Target to post-legalized store merge Move store merge to happen after intrinsic lowering to allow lowered stores to be merged. Some regressions due in MergeConsecutiveStores to missing insert_subvector that are addressed in follow up patch. Reviewers: craig.topper, efriedma, RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34559 llvm-svn: 310710
2017-08-11 21:21:35 +08:00
; X86-NEXT: movw $256, (%ecx) # imm = 0x100
[X86] Regenerate big structure return test and check on x86_64 as well. llvm-svn: 309676
2017-08-01 21:12:15 +08:00
; X86-NEXT: retl
;
; X64-LABEL: ReturnBigStruct2:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X64: # %bb.0: # %entry
[X86] Handle COPYs of physregs better (regalloc hints) Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
2018-09-20 02:59:08 +08:00
; X64-NEXT: movq %rdi, %rax
[X86] Regenerate big structure return test and check on x86_64 as well. llvm-svn: 309676
2017-08-01 21:12:15 +08:00
; X64-NEXT: movl $48, 4(%rdi)
; X64-NEXT: movb $1, 2(%rdi)
[X86][DAG] Switch X86 Target to post-legalized store merge Move store merge to happen after intrinsic lowering to allow lowered stores to be merged. Some regressions due in MergeConsecutiveStores to missing insert_subvector that are addressed in follow up patch. Reviewers: craig.topper, efriedma, RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34559 llvm-svn: 310710
2017-08-11 21:21:35 +08:00
; X64-NEXT: movw $256, (%rdi) # imm = 0x100
[X86] Regenerate big structure return test and check on x86_64 as well. llvm-svn: 309676
2017-08-01 21:12:15 +08:00
; X64-NEXT: retq
Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process. llvm-svn: 157446
2012-05-25 08:09:29 +08:00
entry:
%0 = insertvalue %1 zeroinitializer, i1 false, 0
%1 = insertvalue %1 %0, i1 true, 1
%2 = insertvalue %1 %1, i1 true, 2
%3 = insertvalue %1 %2, i32 48, 3
ret %1 %3
}