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llvm-project/clang/test/CodeGen/avx-cmp-builtins.c

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Fix reliance on -flax-vector-conversions in AVX intrinsics headers and corresponding tests. llvm-svn: 372063
2019-09-17 11:56:30 +08:00
// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -O3 -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - | FileCheck %s
Canonicalize some of the x86 builtin tests and either remove or comment about optimization options. llvm-svn: 250271
2015-10-14 13:40:21 +08:00
// FIXME: The shufflevector instructions in test_cmpgt_sd are relying on O3 here.
Test case for some AVX builtins. Patch by Syoyo Fujita! llvm-svn: 132518
2011-06-03 08:02:45 +08:00
#include <immintrin.h>
//
// Test LLVM IR codegen of cmpXY instructions
//
__m128d test_cmp_sd(__m128d a, __m128d b) {
// Expects that the third argument in LLVM IR is immediate expression
// CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 13)
return _mm_cmp_sd(a, b, _CMP_GE_OS);
}
Fix reliance on -flax-vector-conversions in AVX intrinsics headers and corresponding tests. llvm-svn: 372063
2019-09-17 11:56:30 +08:00
__m128 test_cmp_ss(__m128 a, __m128 b) {
Test case for some AVX builtins. Patch by Syoyo Fujita! llvm-svn: 132518
2011-06-03 08:02:45 +08:00
// Expects that the third argument in LLVM IR is immediate expression
// CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 13)
return _mm_cmp_ss(a, b, _CMP_GE_OS);
}
X86 intrinsics: cmpge|gt|nge|ngt_ss|_sd These intrinsics should return the comparision result in the low bits and keep the high bits of the first source operand. When calling to builtin functions, the source operands are swapped and the high bits of the second source operand are kept. To fix the issue, an extra shufflevector is used. rdar://14153896 llvm-svn: 184110
2013-06-18 03:42:49 +08:00
__m128 test_cmpgt_ss(__m128 a, __m128 b) {
// CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 1)
[InstCombine] canonicalize select shuffles by commuting In PR41304: https://bugs.llvm.org/show_bug.cgi?id=41304 ...we have a case where we want to fold a binop of select-shuffle (blended) values. Rather than try to match commuted variants of the pattern, we can canonicalize the shuffles and check for mask equality with commuted operands. We don't produce arbitrary shuffle masks in instcombine, but select-shuffles are a special case that the backend is required to handle because we already canonicalize vector select to this shuffle form. So there should be no codegen difference from this change. It's possible that this improves CSE in IR though. Differential Revision: https://reviews.llvm.org/D60016 llvm-svn: 357366
2019-03-31 23:01:30 +08:00
// CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
X86 intrinsics: cmpge|gt|nge|ngt_ss|_sd These intrinsics should return the comparision result in the low bits and keep the high bits of the first source operand. When calling to builtin functions, the source operands are swapped and the high bits of the second source operand are kept. To fix the issue, an extra shufflevector is used. rdar://14153896 llvm-svn: 184110
2013-06-18 03:42:49 +08:00
return _mm_cmpgt_ss(a, b);
}
__m128 test_cmpge_ss(__m128 a, __m128 b) {
// CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 2)
[InstCombine] canonicalize select shuffles by commuting In PR41304: https://bugs.llvm.org/show_bug.cgi?id=41304 ...we have a case where we want to fold a binop of select-shuffle (blended) values. Rather than try to match commuted variants of the pattern, we can canonicalize the shuffles and check for mask equality with commuted operands. We don't produce arbitrary shuffle masks in instcombine, but select-shuffles are a special case that the backend is required to handle because we already canonicalize vector select to this shuffle form. So there should be no codegen difference from this change. It's possible that this improves CSE in IR though. Differential Revision: https://reviews.llvm.org/D60016 llvm-svn: 357366
2019-03-31 23:01:30 +08:00
// CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
X86 intrinsics: cmpge|gt|nge|ngt_ss|_sd These intrinsics should return the comparision result in the low bits and keep the high bits of the first source operand. When calling to builtin functions, the source operands are swapped and the high bits of the second source operand are kept. To fix the issue, an extra shufflevector is used. rdar://14153896 llvm-svn: 184110
2013-06-18 03:42:49 +08:00
return _mm_cmpge_ss(a, b);
}
__m128 test_cmpngt_ss(__m128 a, __m128 b) {
// CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 5)
[InstCombine] canonicalize select shuffles by commuting In PR41304: https://bugs.llvm.org/show_bug.cgi?id=41304 ...we have a case where we want to fold a binop of select-shuffle (blended) values. Rather than try to match commuted variants of the pattern, we can canonicalize the shuffles and check for mask equality with commuted operands. We don't produce arbitrary shuffle masks in instcombine, but select-shuffles are a special case that the backend is required to handle because we already canonicalize vector select to this shuffle form. So there should be no codegen difference from this change. It's possible that this improves CSE in IR though. Differential Revision: https://reviews.llvm.org/D60016 llvm-svn: 357366
2019-03-31 23:01:30 +08:00
// CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
X86 intrinsics: cmpge|gt|nge|ngt_ss|_sd These intrinsics should return the comparision result in the low bits and keep the high bits of the first source operand. When calling to builtin functions, the source operands are swapped and the high bits of the second source operand are kept. To fix the issue, an extra shufflevector is used. rdar://14153896 llvm-svn: 184110
2013-06-18 03:42:49 +08:00
return _mm_cmpngt_ss(a, b);
}
__m128 test_cmpnge_ss(__m128 a, __m128 b) {
// CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 6)
[InstCombine] canonicalize select shuffles by commuting In PR41304: https://bugs.llvm.org/show_bug.cgi?id=41304 ...we have a case where we want to fold a binop of select-shuffle (blended) values. Rather than try to match commuted variants of the pattern, we can canonicalize the shuffles and check for mask equality with commuted operands. We don't produce arbitrary shuffle masks in instcombine, but select-shuffles are a special case that the backend is required to handle because we already canonicalize vector select to this shuffle form. So there should be no codegen difference from this change. It's possible that this improves CSE in IR though. Differential Revision: https://reviews.llvm.org/D60016 llvm-svn: 357366
2019-03-31 23:01:30 +08:00
// CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
X86 intrinsics: cmpge|gt|nge|ngt_ss|_sd These intrinsics should return the comparision result in the low bits and keep the high bits of the first source operand. When calling to builtin functions, the source operands are swapped and the high bits of the second source operand are kept. To fix the issue, an extra shufflevector is used. rdar://14153896 llvm-svn: 184110
2013-06-18 03:42:49 +08:00
return _mm_cmpnge_ss(a, b);
}
__m128d test_cmpgt_sd(__m128d a, __m128d b) {
// CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 1)
// CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
return _mm_cmpgt_sd(a, b);
}
__m128d test_cmpge_sd(__m128d a, __m128d b) {
// CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 2)
// CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
return _mm_cmpge_sd(a, b);
}
__m128d test_cmpngt_sd(__m128d a, __m128d b) {
// CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 5)
// CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
return _mm_cmpngt_sd(a, b);
}
__m128d test_cmpnge_sd(__m128d a, __m128d b) {
// CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 6)
// CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
return _mm_cmpnge_sd(a, b);
}